Formal Approaches to Hardware Trust Verification

Farahmandi, Farimah; Huang, Yuanwen; Mishra, Prabhat

doi:10.1007/978-3-319-68511-3_8

Cited by 4 publications

(1 citation statement)

References 37 publications

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“…Detecting vulnerabilities with side effects that span across multiple modules requires loading the RTL code of all the relevant modules and analyzing their intra-and inter-modular states. Currently, these complex signal flows are quickly driving existing tools into a state explosion problem due to the exponential relationships in the underlying modeling algorithms [23,32]. While providing additional computational resources is often used as an adhoc solution, these resources are usually quickly outgrown as a modeled module and flow complexity increase.…”

Section: Cross-modular Effects (Hf-1)mentioning

confidence: 99%

When a Patch is Not Enough - HardFails: Software-Exploitable Hardware Bugs

Dessouky¹,

Gens²,

Haney³

et al. 2018

Preprint

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Modern computer systems are becoming faster, more efficient, and increasingly interconnected with each generation. Consequently, these platforms also grow more complex, with continuously new features introducing the possibility of new bugs. Hence, the semiconductor industry employs a combination of different verification techniques to ensure the security of System-on-Chip (SoC) designs during the development life cycle. However, a growing number of increasingly sophisticated attacks are starting to leverage cross-layer bugs by exploiting subtle interactions between hardware and software, as recently demonstrated through a series of real-world exploits with significant security impact that affected all major hardware vendors.

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Section: Cross-modular Effects (Hf-1)mentioning

confidence: 99%