Formation of three-dimensional and nanowall structures on silicon using a hydrogen-assisted high aspect ratio etching

Azimi, Sara; Mehran, M.; Amini, Aida; Vali, Amin; Mohajerzadeh, S.; Fathipour, Morteza

doi:10.1116/1.3497033

Cited by 21 publications

(20 citation statements)

References 20 publications

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“…This process suffers from low etch rate and high surface roughness of sidewalls. In [16], the very similar process is applied for vertical etching of Si. The only difference is that in the passivation sub‐cycle, a mixture of SF 6 , H 2 and O 2 gases are employed to passivate the surfaces.…”

Section: Semi‐sequential Riementioning

confidence: 99%

“…This method suffers from a cryogenic cooling and certain limitation on masking layer [12]. An alternative process was reported by our group which utilises SF 6 plasma in etching sub-cycle and a mixture of O 2 , H 2 and SF 6 gases in passivation sub-cycle [15][16][17]. This technique uses low-density plasma power and no polymeric passivation is needed.…”

Section: Introductionmentioning

confidence: 99%

“…Plasma parameters in semi-sequential oxygen-free process Schematic of the RIE machine used in our processes[16] Fig. 2 SEM images of the vertically etched sidewalls a Using semi-sequential oxygen-free process b Close-up view of the wall surface c Exploiting semi-sequential vertical etching process employing H 2 and O 2 gases for passivation d Close-up view of the wall surface the process results.…”

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confidence: 99%

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Exploitation of semi‐sequential reactive ion etch processes to fabricate in‐plane Si structures

Zarei

Mohajerzadeh

2018

Micro & Nano Letters

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The work reports on the exploitation of semi-sequential deep reactive ion etching (RIE) processes for realisation of deep vertically etched Si structures on Si substrate applicable in fibre-optic sensing systems. These processes employ different mixtures of gases including hexaflourosulphide, hydrogen and oxygen in a RIE system with a programmed passivation and etching sub-cycles. In the so-called semisequential processes, the intermediate purging steps are eliminated, which results in remaining little trace of reactant gases from the previous sub-cycle in the RIE machine's chamber, which can participate in the process of current sub-cycle. For the sake of minimum optical losses, which are accomplished by highly smooth vertical sidewalls, several etching processes were applied. In these processes, by controlling the etching parameters such as the flow of gases, plasma power and timing of each subsequence, the process can be controlled for minimum under-etch and surface roughness and maximum verticality of sidewalls. However, time and cost considerations should also be noted in the optimum fabrication process.

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Section: Semi‐sequential Riementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

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Exploitation of semi‐sequential reactive ion etch processes to fabricate in‐plane Si structures

Zarei

Mohajerzadeh

2018

Micro & Nano Letters

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“…The Fabrication process of this work consists of two main steps, fabricating the front panel transparent glass and fabricating three dimensional mug-like micro-vessels on a silicon substrate. The fabrication process of 3-D silicon vessels is based on our recently reported deep reactive etching technique where a sequential etching/passivation procedure is employed [1,2]. In this work, ptype 1-5Ω-cm (100) silicon wafers are used.…”

Section: Fabrication Processmentioning

confidence: 99%

P‐184: Application of Deep Micromachining of Silicon Substrates to Realize a Novel Electrochromic Based Projection Display

Amirsolaimani

Azimi

Mohajerzadeh

2011

Symp Digest of Tech Papers

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In this paper, we report on the realization of miniaturized projection displays on silicon substrates using a highly programmable deep reactive ion etching technique. The micromachined silicon substrates have been used to incorporate Liionic electro-chromic solutions. The use of tungsten oxide (WO 3 ) in conjunction with the ITO electrodes, leads to a transparent or opaque interfaces which can be used as a method to distinguish different spots in an image, provided an external light source is exploited. The formation of highly complex three-dimensional structures is feasible during the deep reactive ion etching of silicon wafers, while desired under-etching is achieved by controlling the etching parameters. The evolution of cup-like micro-mirrors can be carried out at micrometer sizes leading to ultra-high resolution projection systems. A passive addressing is feasible between the top ITO-lines placed on a glass substrate and the bottom cavity-holding substrate. By addressing individual or clusters of pixels one can achieve desired images.

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“…[35][36][37] However, MEMS depend primarily on two processing techniques, surface micromachining and deep reactive ion etching (DRIE). 38 These techniques are expensive and require continuous monitoring to assure tight process control. In DRIE, for example, careful cycling of etch process parameters is needed to create high aspect ratio features in silicon.…”

Section: Introductionmentioning

confidence: 99%

Study of solder bridging for the purpose of assembling three-dimensional structures

Rao¹,

Lusth²,

Burkett³

2012

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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Recently, soldering has been used to assemble three-dimensional microscale structures. Solder is deposited on adjacent metallic faces of planar polyhedral patterns, bridging the small gaps between individual faces. When all but one face of a polyhedral pattern are freed from the substrate and solder is reheated to a liquid state (reflow), the free faces of the pattern fold upward, out of the plane, to form the desired polyhedron. The wetting of solder with regards to coverage of metallic faces has been described previously, but the lateral bridging between the metal faces remains relatively unexplored. The goal of this work is to characterize the parameters influencing the bridging and folding process for two different ways of dip soldering: face and edge soldering. Face soldering refers to the complete wetting of metal faces, whereas edge soldering refers to selectively applying solder on the edges of a face that come in contact with other faces when folded. Our work explores bridging yield for various gap spacings and face thicknesses for eight different polyhedral patterns. Experiments show that the thickness and gap spacing strongly influence successful bridging. Experiments also show that improved control over the bridging process increases the yield of folded structures. In particular, gap spacing is positively correlated to face thickness for successful folding. Moreover, face soldering results in higher yields than edge soldering for all patterns.

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Formation of three-dimensional and nanowall structures on silicon using a hydrogen-assisted high aspect ratio etching

Cited by 21 publications

References 20 publications

Exploitation of semi‐sequential reactive ion etch processes to fabricate in‐plane Si structures

Exploitation of semi‐sequential reactive ion etch processes to fabricate in‐plane Si structures

P‐184: Application of Deep Micromachining of Silicon Substrates to Realize a Novel Electrochromic Based Projection Display

Study of solder bridging for the purpose of assembling three-dimensional structures

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