Formulae and applications of interconnect estimation considering shield insertion and net ordering

Abstract-The crosstalk effect is one of the main problems in deep submicron designs of high-speed buses. To mitigate the crosstalk effect, there are several types of crosstalk avoidance codes proposed in the literature. In this paper, we are particularly interested in generating forbidden transition codes that do not have opposite transitions on any two adjacent wires. For this, we propose a sequential bit-stuffing algorithm and a parallel bit-stuffing algorithm. For the sequential bitstuffing algorithm, we perform a worst-case analysis and a probabilistic analysis. We show by both theoretic analysis and simulations that the coding rate of the sequential bit-stuffing encoding scheme is quite close to the Shannon capacity. In particular, for a bus with n = 10 parallel wires, the difference is only 2.2%. Using a Markov chain analysis, we show that the coding rate of the parallel bit-stuffing algorithm is only slightly lower than that of the sequential bit-stuffing algorithm. The implementation complexity of the parallel bit-stuffing algorithm is linear with n. In comparison with the existing forbidden transition codes that use the Fibonacci representation in the literature, our bit-stuffing algorithms not only achieve higher coding rates but also have much lower implementation complexity.

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“…This is because we always stuff a bit (by setting c i (t) = c i (t − 1) in both cases) to prevent such a forbidden transition in (2).…”

Section: Parallel Bit-stuffing Algorithmmentioning

confidence: 99%

A Bit-Stuffing Algorithm for Crosstalk Avoidance in High Speed Switching

Cheng

Huang

et al. 2010

2010 Proceedings IEEE INFOCOM

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“…Assuming that current will return from the nearest shield, the loop inductance model is used in [1,8,9]. A table-based partial inductance model is adopted without pre-assuming any current return path [10,11,12]; additionally, a coupling inductance screening rule [9] is employed to decide the scope of the current return path. Also, a formula-based K eff model is proposed in [8] as the figures of merit for inductive coupling.…”

Section: Introductionmentioning

confidence: 99%

Shielding Area Optimization Under the Solution of Interconnect Crosstalk

Cai

Zhao

Zhou

et al. 2005

J Comput Sci Technol

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As the technology advances into deep sub-micron era, crosstalk reduction is of paramount importance for signal integrity. Simultaneous shield insertion and net ordering (SINO) has been shown to be effective to reduce both capacitive and inductive coupling. Although shield insertion could reduce crosstalk efficiently, a large scale of unnecessary shields will bring the shielding area problem which is also critical for an efficient SINO algorithm. In this paper, we propose three novel algorithms using fewer shields to solve SINO problem: namely, net coloring (NC), efficient middle shield insertion (EMSI) and NC+EMSI. Compared to the corresponding algorithms in previous work [1], our algorithms can reduce shielding area largely with short runtime.

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“…For example, shielding estimation has been used to develop an efficient two-phase algorithm for the SPR problem [6]. Further, we have recently developed shielding estimation for SINO solutions under an explicit RLC noise constraint [5,7].…”

Section: Conclusion and Discussionmentioning

confidence: 99%

“…We are incorporating the prerouting estimation and SPR formulation to a global router for signal and power net co-design. Even though the explicit RLC noise model used in [5,7] is more accurate, we plan to first apply the ¡ £ ¢ § ¤ ¤ model to the global router due to the simplicity and high fidelity of the ¡ £ ¢ ¥ ¤ ¦ ¤ model. These new results will be made available at http://eda.ece.wisc.edu.…”

Section: Conclusion and Discussionmentioning

confidence: 99%