Four-Channel WDM Transmitter With Heterogeneously Integrated III-V/Si Photonics and Low Power 32 nm CMOS Drivers

Huynh, Tam N.; Ramaswamy, Anand; Rimolo-Donadío, Renato; Schow, Clint L.; Roth, Jonathan E.; Norberg, Erik; Proesel, Jonathan E.; Guzzon, Robert S.; Shin, Jang-Uk; Rylyakov, Alexander V.; Baks, Christian; Koch, Brian R.; Sparacin, Daniel K.; Fish, G.A.; Lee, Benjamin G.

doi:10.1109/jlt.2016.2578644

Cited by 6 publications

(6 citation statements)

References 11 publications

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“…The η dr considers the driver complexity (pre-driver stages including level shifter) and is estimated around 30% to 40%. The derived energy consumption is consistent with values reported in the literature [5], [8], [19]. In an HBM block, there are 128 MZM and 2 drivers per modulator, resulting in the red hatched bars of total power consumption in Fig.…”

Section: B Power Consumption and Performance Trade-offsupporting

confidence: 88%

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A Sub-pJ/Bit, Low-ER Mach–Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects

Michard

Carpentier

Michit

et al. 2020

IEEE J. Select. Topics Quantum Electron.

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Designing high-speed and low-power interconnects is a challenge for high performance computing applications, while silicon photonics can provide attractive solutions to perform high-density communications. This paper presents an electrooptic transmitter operating at 20 Gbps (gigabit per second), as a first step toward the demonstration of chip-to-chip optical links. The architecture is based on a dual-drive Mach-Zehnder interferometer co-integrated with a 55-nm CMOS driver. Design optimizations and trade-offs analysis enable low-energy and negligible bit error rate (BER < 10 −12 ) transmission at 20 Gbps, by exploring a firstly reported low extinction ratio (ER) modulator. A wire-bonding board assembly is then carried out to co-integrate hybrid transmitter. Co-simulations are presented and show good agreement with experiments. Combined with an adequate MZM bias, this solution achieves a minimal energy consumption of 0.9 pJ/bit while ensuring a sufficiently large ER of 0.73 dB for chip-to-chip interconnects applications.

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Section: B Power Consumption and Performance Trade-offsupporting

confidence: 88%

“…Table II shows an overview of the proposed driver performance, and a comparison with the state-of-the-art. This work achieves one of the best energy efficiency at comparable DR as presented in [19]. In addition, the design optimization, described in Subsec.…”

Section: High-speed Low-power Driver Measurementsmentioning

confidence: 99%

A Sub-pJ/Bit, Low-ER Mach–Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects

Michard

Carpentier

Michit

et al. 2020

IEEE J. Select. Topics Quantum Electron.

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“…The hybrid III-V/SOI DFB laser was fabricated as described in [3] and its structure is shown in Fig. 1(a).…”

Section: Fabrication and Small-signal Characterizationmentioning

confidence: 99%

“…Furthermore, thanks to advances in integration of III-V materials on the silicon-on-insulator (SOI) platform [3,4], high-speed transceivers have been demonstrated [4,5].…”

Section: Introductionmentioning

confidence: 99%

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1.5-μm Directly modulated transmission over 66 km of SSMF with an integrated hybrid III-V/SOI DFB laser

Cristofori

Ros

Chaibi

et al. 2017

2017 IEEE 14th International Conference on Group IV Photonics (GFP)

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Peucheret, C. (2017). 1.5-m Directly modulated transmission over 66 km of SSMF with an integrated hybrid III-V/SOI DFB laser. In Proceedings of the 2017 IEEE 14th International Conference on Abstract: A hybrid III-V/SOI directly modulated DFB laser operating at 1.5 μm is fabricated, showing a side mode suppression ratio above 50 dB and a 3-dB bandwidth of 12 GHz. Error-free transmission (BER<10 -9 ) at 10 Gb/s over 66-km SSMF is demonstrated without dispersion compensation and FEC. IntroductionThe significant growth of internet traffic in recent years has been driving a strong research effort on low-cost highspeed solutions for access networks. In order to reduce the network cost and complexity, the focus has been directed towards finding integrated and compact solutions capable of reaching transmission distances above 40 km of standard single mode fiber (SSMF), which could still satisfy the stringent energy and cost requirements [1].Among different platforms, silicon photonics has emerged as the most promising candidate for the integration of photonic and electronic integrated circuits [2,3]. Furthermore, thanks to advances in integration of III-V materials on the silicon-on-insulator (SOI) platform [3,4], high-speed transceivers have been demonstrated [4,5].Directly modulated lasers (DMLs) have been recognized as good candidates for short reach (≤ 10 km) applications thanks to their higher emitted power and lower power consumption compared to integrated externally modulated lasers (EMLs). EMLs can usually reach higher modulation speeds and are preferable for applications with a reach above 10 km that take advantage of their higher extinction ratio (ER) and lower frequency chirp compared to DMLs [6]. However, there is a trade-off between low frequency chirp and emitted power in such devices [7], which has an impact for achieving error-free performance over distances above 40 km and in high loss budget situations [8].To extend the reach, either transmission in the O-band [9] or digital signal processing (DSP) [9, 10] is typically used. However, transmitting in the O-band will increase the losses, affecting the power budget for extended reach (> 40 km) applications, while DSP will increase the latency and power consumption. Therefore, DMLs that can transmit over such distances at 1.5 μm are highly desirable.In this work, we report on an integrated 1.5-μm hybrid III-V/SOI DML operating at 10 Gb/s capable of transmitting over 66 km of SSMF without any dispersion compensation, equalization and FEC.

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Photonic-integrated circuits for switched network interconnects

Fathololoumi

Akulova

Seyedi

et al. 2023

Integrated Photonics for Data Communication Applications

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Four-Channel WDM Transmitter With Heterogeneously Integrated III-V/Si Photonics and Low Power 32 nm CMOS Drivers

Cited by 6 publications

References 11 publications

A Sub-pJ/Bit, Low-ER Mach–Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects

A Sub-pJ/Bit, Low-ER Mach–Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects

1.5-μm Directly modulated transmission over 66 km of SSMF with an integrated hybrid III-V/SOI DFB laser

Photonic-integrated circuits for switched network interconnects

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