FPA Optimized Selective Harmonic Elimination in Symmetric–Asymmetric Reduced Switch Cascaded Multilevel Inverter

Panda, Kaibalya Prasad; Bana, Prabhat Ranjan; Panda, Gayadhar

doi:10.1109/tia.2020.2981601

Cited by 71 publications

(52 citation statements)

References 40 publications

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“…Researchers have developed new configurations to replace conventional two‐level inverters with multi‐level inverter (MLI) 9 . The MLI can generate staircase output voltage waveform closer to sinusoidal waveform providing low electromagnetic interference 10–12 and low device stress with an increased number of levels 13–15 . The inherent property of MLI finds numerous applications in the areas of high voltage medium power applications, which employ a solar PV system.…”

Section: Introductionmentioning

confidence: 99%

Design of nine step switched capacitor multilevel inverter and its cascaded extension

Velliangiri¹,

Ramasamy

Prem³

et al. 2021

Circuit Theory & Apps

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Summary Conventionally, multilevel inverter topologies require components like boost converter, voltage balancing circuits in addition to its switches and gate driver circuitry resulting in increased complexity. A new multilevel inverter topology using the concept of switched‐capacitor (SC) is proposed in this article. The basic structure capable of generating 9 level (9L) output voltage waveform with magnitude twice the input voltage at its terminals is proposed. Further, two identical structures are cascaded horizontally to attain 17 level (17L) based on structural modification is suggested. Simulation results are used to analyze the performance of the proposed 9L‐SCMLI and 17L‐SCMLI in the aspects of total harmonic distortion, R, RL, and dynamic loading conditions. The 9L‐SCMLI prototype model is developed to validate the adaptability of the proposed system.

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Section: Introductionmentioning

confidence: 99%

Design of nine step switched capacitor multilevel inverter and its cascaded extension

Velliangiri¹,

Ramasamy

Prem³

et al. 2021

Circuit Theory & Apps

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“…The lower the TSV, the lower the power losses in the switches. In order to reduce voltage stress, an enhanced H-bridge with different DC sources has been proposed in [13]. However, for improving the voltage and current quality, the converters require more levels; so the number of switches increases.…”

Section: Introductionmentioning

confidence: 99%

“…Due to that, in general, cost, conduction and switching losses and complexity of the control system increase, and reliability reduces. Many structures have been introduced to increase the number of voltage levels, in order to improve the system's performance [13][14]16].…”

Section: Introductionmentioning

confidence: 99%

“…Asymmetrical CHB multilevel inverter (CHB-MLI) topologies have been introduced to increase the number of levels by connecting different non-equal voltage DC sources [13][14][15]. The main drawback is that the switches' stresses are not the same.…”

Section: Introductionmentioning

confidence: 99%

“…This way, the proposed single unit offers a great tradeoff between the number of DC sources, number of switches, and the number of levels, thus producing a very low distortion in the output port. This inverter can be widely used as an interface for renewable energy sources and high-voltage overhead distribution lines [13][14]. In addition, several single basic units can be connected in cascade to reach a higher voltage range and a greater number of levels because the cascaded units can have different DC input voltages and thus can create additional voltage levels The paper is structured as follows.…”

Section: Introductionmentioning

confidence: 99%

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A New Asymmetric Cascaded Multilevel Converter Topology With Reduced Voltage Stress and Number of Switches

et al. 2021

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This paper presents a new structure of a multilevel inverter with fewer components, which is suitable for renewable energy sources and industrial loads applications. The structure has three unequal input sources and ten switches that can generate a 15-level output voltage. Furthermore, it can be connected in cascade for increasing, even more, the number of levels and output voltage. The main feature of the proposed inverter is its very low harmonic distortion at the output voltage and current due to the control method, which is based on the nearest level control method for generating a high-quality output voltage. A typical application of this inverter is in solar cells and wind turbines. Both simulations in Matlab/Simulink and experimental results in a scaled-down prototype validate the proposed theoretical analysis.INDEX TERMS Multilevel inverter, cascading converters, low harmonics, losses, distortion.

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A generalized diode containing bidirectional topology for multilevel inverter with reduced switches and power loss

Montazer

Olamaei

Hosseinpour

et al. 2021

Circuit Theory & Apps

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Multilevel inverters (MLIs) have made great strides in utilizing renewable energy and industrial applications compared to conventional two‐level inverters in terms of output voltage quality, smaller size of the output filter, and higher efficiency. This paper describes a new diode containing bidirectional topology for single‐phase MLI. This structure is presented to reduce the count of switches, isolated voltage sources, and drivers that can increase the number of output levels modularly. This converter, despite the use of diodes, can feed bidirectionally the low power factor inductive–resistive loads. The proposed structure has been designed to achieve a higher output voltage levels relative to the number of switches, drivers, and direct current (DC) voltage sources. Three different algorithms have been proposed to determine the values of DC voltage sources. To confirm the superiority of the proposed structure, a detailed comparison has been carried out with other MLI topologies. Then the proposed topology is simulated in Matlab/Simulink environment using the nearest level modulation technique. Finally, experimental results are presented to confirm the performance of the designed structure in symmetric and asymmetric topologies.

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FPA Optimized Selective Harmonic Elimination in Symmetric–Asymmetric Reduced Switch Cascaded Multilevel Inverter

Cited by 71 publications

References 40 publications

Design of nine step switched capacitor multilevel inverter and its cascaded extension

Design of nine step switched capacitor multilevel inverter and its cascaded extension

A New Asymmetric Cascaded Multilevel Converter Topology With Reduced Voltage Stress and Number of Switches

A generalized diode containing bidirectional topology for multilevel inverter with reduced switches and power loss

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