FPG-AI: A Technology-Independent Framework for the Automation of CNN Deployment on FPGAs

Abstract

In recent years, Convolutional Neural Networks (CNNs) have demonstrated outstanding results in several emerging classification tasks. The high-quality predictions are often achieved with computationally intensive workloads that hinder the hardware acceleration of these models at the edge. Field Programmable Gate Arrays (FPGAs) have proven to be energy efficient platforms for the execution of these algorithms and works proposing methods for automating the design on these devices have acquired relevance. The common purpose is to enable a wide range of users without specific skills to accelerate CNNs on FPGAs with reduced development times. In this paper, we present FPG-AI, a technology-independent toolflow for automating the deployment of CNNs on FPGA. The framework combines the use of model compression strategies with a fully handcrafted Hardware Description Languages (HDL)-based accelerator that poses no limit on device portability. On top of that, an automation process merges the two design spaces to define an end-to-end and ready-to-use tool. Experimental results are reported for reference models extracted from the literature (LeNet, NiN, VGG16, MobileNet-V1) on multiple classification datasets (MNIST, CIFAR10, ImageNet). To prove the technology independence of FPG-AI, we characterize the toolflow on devices with heterogeneous resource budgets belonging to different vendors (Xilinx, Intel, and Microsemi). Comparison with state-of-the-art work confirms the unmatched device portability of FPG-AI and shows performance metrics in line with the literature.

Design and Evaluation of CPU-, GPU-, and FPGA-Based Deployment of a CNN for Motor Imagery Classification in Brain-Computer Interfaces

“…The main drawback of FPGA technology regards the long development time and the high design costs necessary to configure the programmable logic to implement an accelerator for a DNN model. To turn around this problem, the trained EEGNet model was implemented on this technology exploiting FPG-AI [37,38], a novel end-to-end tool flow for the automatic deployment of CNNs on FPGAs.…”

“…By undertaking a comprehensive design space exploration (DSE) and leveraging a highly detailed analytical hardware model, FPG-AI autonomously generates a CNN-specific hardware accelerator, adept at efficiently harnessing FPGA resources while maintaining high-performance levels and adhering to the user's constraints. The list of supported layers of the tool flow is reported in [37]. For an overview of the process, refer to Figure 5.…”

Overview of AI-Models and Tools in Embedded IIoT Applications

“…Lastly, the Vitis AI Runtime (VART) furnishes a low-level API accessible via both C++ and Python, facilitating seamless integration of the DPU within software applications. Despite numerous endeavors to port neural network models onto FPGA platforms in recent years [153][154][155], the process remains laborious and often necessitates specialized hardware design expertise. Vitis AI aims to alleviate these challenges by streamlining FPGA-based hardware acceleration, offering an accessible and efficient solution.…”