Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design 2006
DOI: 10.1145/1150343.1150356
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FPGA architecture for static background subtraction in real time

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Cited by 13 publications
(14 citation statements)
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“…Hence, for a fair comparison, Table I reports synthesis results of the proposed architecture for the same Altera FPGAs. Clearly, the proposed architecture requires [10] and [11]. It has a maximum frequency of operation (Fmax) of 125.4MHz on Altera Cyclone III, the highest reported so far, due to its multiplier free and optimized hardware architecture.…”
Section: Object Extractionmentioning
confidence: 99%
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“…Hence, for a fair comparison, Table I reports synthesis results of the proposed architecture for the same Altera FPGAs. Clearly, the proposed architecture requires [10] and [11]. It has a maximum frequency of operation (Fmax) of 125.4MHz on Altera Cyclone III, the highest reported so far, due to its multiplier free and optimized hardware architecture.…”
Section: Object Extractionmentioning
confidence: 99%
“…The proposed object extraction scheme, consisting of background subtraction, row/column scanning and threshold comparison blocks, was implemented and tested on various FPGAs. Table I compares the proposed architecture with [10] and [11], which have reported synthesis results for similar object extraction functions. Both [10] and [11] have used Altera FPGAs to synthesise their architectures.…”
Section: Object Extractionmentioning
confidence: 99%
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“…In the paper [29], foreground object detection using background subtraction was presented. The background was modeled statistically using pixel-by-pixel basis-a single pixel was modeled by the expected colour value, the standard deviation of colour value, the variation of brightness distortion and the variation of chromaticity distortion.…”
Section: Introductionmentioning
confidence: 99%
“…Graphics hardware has recently been used to achieve real-time performance. In [14], [15], field programmable gate arrays are used to imCopyright c 2011 The Institute of Electronics, Information and Communication Engineers plement algorithms based on background subtraction. However, restrictions on the architecture still hinder effective performance.…”
Section: Introductionmentioning
confidence: 99%