FPGA-based 6-DoF pose estimation with a monocular camera using non co-planer marker and application on micro quadcopter

Konomura, Ryo; Hori, Koichi

doi:10.1109/iros.2016.7759626

Cited by 14 publications

(6 citation statements)

References 18 publications

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“…There are other ways to improve the robustness of the marker system. In Konomura and Hori (), the authors build a noncoplanar marker and show that the system can provide a more robust pose estimation. As basic image‐processing techniques may suffer from poor image conditions, such as camera defocus and motion blur, Medina‐Carnicer () uses a support vector machine for marker identification and presents more robust pose estimation results.…”

Section: Related Workmentioning

confidence: 99%

Hierarchical fiducial marker design for pose estimation in large‐scale scenarios

Wang

Shi

et al. 2018

Journal of Field Robotics

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In this paper, a hierarchical fiducial marker, called HArCo, is designed to guarantee a smooth pose estimation for large-scale applications. HArCo markers have a visually identifiable structure on multiple scales, so they can be used for consistent pose estimation across a range of altitudes.Experimental results are presented to validate the performance of the proposed methodologies;oscillating platform landing experiments were conducted to show the ability of HArCo to be used in real landing tasks on the deck of a ship.

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Section: Related Workmentioning

confidence: 99%

Hierarchical fiducial marker design for pose estimation in large‐scale scenarios

Wang

Shi

et al. 2018

Journal of Field Robotics

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“…SLAM is a collective name for a group of algorithms which have varying complexity and quality, the comparison should be made while considering the properties of the particular SLAM algorithm. SLAM algorithms on FPGAs often rely heavily on properties of the environment like in [2] and [3]. [7] presents an interesting approach of modifying the data structure of the pose and landmark graph to obtain efficient memory access management to solve the non-linear least square problem.…”

Section: Related Workmentioning

confidence: 99%

Design-time improvement using a functional approach to specify GraphSLAM with deterministic performance on an FPGA

Appel

Folmer

Kuper

et al. 2017

2017 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS)

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SLAM is a fundamental problem in robotics that can be solved by a set of algorithms that are known to have large computational complexity. GraphSLAM contains a rapidly growing system of equations which are often solved by sparse evaluation techniques. This paper proposes a technique to evaluate sparse equations on an FPGA by restricting the maximum amount of items in the system. The implementation is done using CλaSH which allows a transformation from mathematical descriptions to a hardware design. The results show a scalable hardware design that can be used to solve small and large systems with dynamic parallelism.

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“…The application presented in [ 10 ] is tested on several commercial devices such as iPhones. A pose estimation system for Unmanned Aerial Vehicles (UAVs) is implemented in [ 11 ]. It is based on the use of 16 landmarks and is implemented on a Zynq-7000 board.…”

Section: Introductionmentioning

confidence: 99%

A High Performance and Robust FPGA Implementation of a Driver State Monitoring Application

Christakos

Petrellis

Mousouliotis

et al. 2023

Sensors

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A high-performance Driver State Monitoring (DSM) application for the detection of driver drowsiness is presented in this paper. The popular Ensemble of Regression Trees (ERTs) machine learning method has been employed for the alignment of 68 facial landmarks. Open-source implementation of ERTs for facial shape alignment has been ported to different platforms and adapted for the acceleration of the frame processing speed using reconfigurable hardware. Reducing the frame processing latency saves time that can be used to apply frame-to-frame facial shape coherency rules. False face detection and false shape estimations can be ignored for higher robustness and accuracy in the operation of the DSM application without sacrificing the frame processing rate that can reach 65 frames per second. The sensitivity and precision in yawning recognition can reach 93% and 97%, respectively. The implementation of the employed DSM algorithm in reconfigurable hardware is challenging since the kernel arguments require large data transfers and the degree of data reuse in the computational kernel is low. Hence, unconventional hardware acceleration techniques have been employed that can also be useful for the acceleration of several other machine learning applications that require large data transfers to their kernels with low reusability.

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FPGA-based 6-DoF pose estimation with a monocular camera using non co-planer marker and application on micro quadcopter

Cited by 14 publications

References 18 publications

Hierarchical fiducial marker design for pose estimation in large‐scale scenarios

Hierarchical fiducial marker design for pose estimation in large‐scale scenarios

Design-time improvement using a functional approach to specify GraphSLAM with deterministic performance on an FPGA

A High Performance and Robust FPGA Implementation of a Driver State Monitoring Application

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