FPGA based chip emulation system for test development of analog and mixed signal circuits: A case study of DC–DC buck converter

Bhattacharya, Rahul; Biswas, Santosh; Mukhopadhyay, Siddhartha

doi:10.1016/j.measurement.2012.04.022

Cited by 15 publications

(51 citation statements)

References 20 publications

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“…The relationship of current and voltage in inductance can be derived from formula (7). It is given as formula (8)…”

Section: Output Power and Other Parametersmentioning

confidence: 99%

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Design of High Efficiency Pulse Power Amplifier for Alarm Based on Floating Ground

HAN¹,

JIN²

2017

dtetr

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Abstract. In this paper a high efficiency pulse power amplifier for alarm based on floating ground is proposed. This pulse power amplifier, adopting inductive flyback converter, can continuously change the input voltage from 10~30V to 2.5~18V by floating ground, and then provide pulse power driver with variable operating voltage. Thus, volume adjustment can be achieved continuously. This method can help avoid the use of expensive class D amplifier, and the whole circuit is simple and stable. It has wide working voltage, which can greatly reduce the cost, narrow the product category, and make convenient its maintenance and management, so that the competitiveness of products can be improved substantially.

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“…The relationship of current and voltage in inductance can be derived from formula (7). It is given as formula (8)…”

Section: Output Power and Other Parametersmentioning

confidence: 99%

“…The homo-phase input terminal is connected to 2.5V [8,9]. So the output voltage of UC3843 is determined by the output voltage of error amplifier.…”

Section: The Range Of Output Voltage and Other Parametersmentioning

confidence: 99%

Design of High Efficiency Pulse Power Amplifier for Alarm Based on Floating Ground

HAN¹,

JIN²

2017

dtetr

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“…A fault diagnosis system executes 3 tasks: (1) detection makes a binary decision whether or not a fault has occurred, (2) identification determines the location of the faulty component, and (3) a severity assessment determines the extent of the fault. This paper focuses on the features (1) and (2), with an application to DC‐DC buck converter . Fault detection and identification (FDI) for power electronic systems has already been explored in details in Poon et al, primarily for specific converter topologies and for specific converter faults.…”

Section: Introductionmentioning

confidence: 99%

“…That, in turn, would shorten time‐to‐market as well as enhance reliability of the design significantly. The platform established in Bhattacharya et al provides a basic framework for emulating AMS circuits, namely, a power converter under ideal conditions (ie, ideal behavior of Op‐amp, ideal behavior of capacitor, inductors, and resistors without any parasitics). An utmost effort paid off in Bhattacharya et al to model and emulate various nonidealities and well‐accepted faults (ie, increase in series resistance of output capacitor, loss of inductance in input inductor, MOSFET stuck failure, diode failure, and sensor failures) in a power converter, but no attention was paid in detection or identification of faults.…”

Section: Introductionmentioning

confidence: 99%

“…In this paper, we have developed an FPGA‐based fault emulation and detection framework for switching power converters where BMs of power converter along with its fault sensitive detection filter are emulated in the presence of well‐accepted fault events followed by detection and identification of faults by monitoring the residuals generated by the detection filter. Thus, verification of effectiveness of FDI framework can be made feasible at an early stage of the design much prior to fabrication. Like previous works, the approach presented in this paper also exploits numerical methods to implement differential equations into fixed‐point architectures from floating‐point BMs in MATLAB/SIMULINK with the support of third party tools, namely, Xilinx System Generator (XSG) for its several benefits highlighted in Bhattacharya et al The proposed technique is demonstrated using a case study of a current mode buck‐type switching converter implemented on Xilinx Kintex ‐ 7 FPGA. In this work, a greater attention is paid in modeling parasitics of a peak‐current‐mode–controlled buck‐type switching converter in fixed‐point XSG platform. The converter switching model is preferably used to build converter power stage with parasitics, whereas current mode PWM controller is modeled in the same way as done in Bhattacharya et al with nonidealities. Besides power stage parasitics, one of the main objectives of this work is fixed‐point modeling and FPGA‐based simulation (or “emulation”) of observer‐based fault diagnoser for switching power converter.…”

Section: Introductionmentioning

confidence: 99%

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Fault diagnosis in switched‐linear systems by emulation of behavioral models on FPGA: A case study of current‐mode buck converter

Bhattacharya

Kumar

Biswas

2017

Int J Numerical Modelling

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This paper presents an Field‐Programmable Gate Array (FPGA)‐based fault emulation and detection framework for switched‐linear systems commonly encountered in power electronics. The proposed framework exploits high‐level behavioral modeling that maps analog functionality into fixed‐point architectures supported by FPGAs. This work is mainly concerned with modeling and validation of effectiveness of a fault diagnoser of a power converter much before its fabrication. The proposed concept of fault diagnosis at presilicon stage overcomes several reliability issues in power electronic systems and enables design and development of test resources, verification of test bed, and interconnecting circuitry at an early stage of the design. To illustrate applicability of this environment, well‐accepted fault events including hard and soft faults are emulated with the help of a nonideal model of a buck converter and a piecewise linear detection filter, which follow an observer‐based residual generation for fault detection. The paper also shows that the proposed method is equally applicable for detection of faults under unstable operation of the converter. The effectiveness of the proposed framework is evaluated through FPGA‐based simulation (or “emulation”) of a peak‐current‐mode–controlled buck‐type switching converter implemented on Xilinx Kintex‐7 FPGA in MATLAB/Simulink environment with Xilinx System Generator support. To the best of our knowledge, fault diagnosis in power converter by emulation of its nonideal model on FPGA is attempted for the first time in the literature. Experimental results show that power converter faults can be easily detected by monitoring detection filter residuals while some of the faults can be precisely identified.

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Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC–DC buck converter

Bhattacharya

Kumar

Biswas

2017

Circuit Theory & Apps

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Summary This paper presents a semi‐automated word‐length optimization framework to reduce field‐programmable gate array (FPGA) resource utilization for FPGA‐based pre‐silicon test emulation of analog and mixed signal circuits while achieving the desired accuracy and overcoming long optimization time. Although high‐level behavioral models exist for modeling analog and mixed signal circuits, these comprise many complex differential equations which cannot be realized implicitly using Boolean logic (which is the basic functional block of an FPGA) on an FPGA. So, a more convenient way is explored to map analog circuits into digital domain by converting them into fixed‐point architectures because of its advantage of manipulating data with lower word‐length. To address the loss of accuracy due to finite word‐length effects and limited reconfigurable resources, word‐lengths are optimized under the constraint of given performance metrics. The proposed technique built in MATLAB/Simulink environment with Xilinx System Generator support is illustrated with the help of a case study of a peak‐current‐mode‐controlled buck‐type switching converter implemented on Xilinx Virtex™‐5 FPGA. To illustrate the applicability of this environment for pre‐silicon test development, well‐accepted fault models are emulated with the help of non‐ideal model of a buck converter. The emulation results are seen to be close to that of a post‐fabricated power converter in the presence of faults. Experimental results show that FPGA resource utilization can be reduced significantly while achieving the desired performance accuracy under the constraint of multiple error metrics. Copyright © 2017 John Wiley & Sons, Ltd.

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FPGA based chip emulation system for test development of analog and mixed signal circuits: A case study of DC–DC buck converter

Cited by 15 publications

References 20 publications

Design of High Efficiency Pulse Power Amplifier for Alarm Based on Floating Ground

Design of High Efficiency Pulse Power Amplifier for Alarm Based on Floating Ground

Fault diagnosis in switched‐linear systems by emulation of behavioral models on FPGA: A case study of current‐mode buck converter

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC–DC buck converter

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