This study proposes an FPGA‐based hardware in the loop (HIL) emulator for speed‐sensorless of induction motor (IM) constant switching frequency controller‐based direct torque control (CSFC‐DTC) with a novel bi input‐reduced order extended Kalman filter (BI‐ROEKF). The full precision single floating point numbers in the IEEE 754 standard are used during the implementation of the HIL emulator which contains closed‐loop speed‐sensorless drive system of IM on the Xilinx Virtex XC5VLX‐110T ML506 FPGA board. In this HIL emulator of speed‐sensorless IM drive system, stator stationary axis components of stator flux, rotor mechanical angular speed, load torque, stator and rotor resistances are estimated with the novel BI‐ROEKF which is proposed for the first time in the literature. The proposed BI‐ROEKF is created by applying two different non‐linear and linear system input functions obtained from two different IM models to the single reduced order extended Kalman filter (ROEKF) algorithm. Thus, the order and the computational burden of the EKF are reduced. The HIL emulator of the speed‐sensorless drive system of IM is implemented on FPGA using the advantage of hand‐written VHDL on getting an optimal logical design to reduce the sampling time which directly effects the estimation performance of the model‐based estimator like the novel BI‐ROEKF and hence the control performance of drive system. The estimation performance of the novel BI‐ROEKF is tested with speed‐sensorless CSFC‐DTC IM drive system under different challenging scenarios in HIL emulator. Thus, the control and the implementation performances of digitalised emulator are tested. Finally, the estimation and control performance results and the execution time of the each part of the proposed HIL emulator of the speed‐sensorless BI‐ROEKF‐based CSFC‐DTC of the IM are presented.