FPGA‐based HPC accelerators: An evaluation on performance and energy efficiency

Abstract

Hardware specialization is a promising direction for the future of digital computing. Reconfigurable technologies enable hardware specialization with modest non‐recurring engineering cost, but their performance and energy efficiency compared to state‐of‐the‐art processor architectures remain an open question. In this article, we use FPGAs to evaluate the benefits of building specialized hardware for numerical kernels found in scientific applications. In order to properly evaluate performance, we not only compare Intel Arria 10 and Xilinx U280 performance against Intel Xeon, Intel Xeon Phi, and NVIDIA V100 GPUs, but we also extend the Empirical Roofline Toolkit (ERT) to FPGAs in order to assess our results in terms of the Roofline model. We show design optimization and tuning techniques for peak FPGA performance at reasonable hardware usage and power consumption. As FPGA peak performance is known to be far less than that of a GPU, we also benchmark the energy efficiency of each platform for the scientific kernels comparing against microbenchmark and technological limits. Results show that while FPGAs struggle to compete in absolute terms with GPUs on memory‐ and compute‐intensive kernels, they require far less power and can deliver nearly the same energy efficiency.

Accelerating legacy applications with spatial computing devices

“…Future work activities will be also oriented to test the proposed approach by porting larger and complex Fortran code to the FPGA devices (including AMD/Xilinx ones), as well as to test the synthesized kernels with larger (real) datasets that may provide more chances of making emerge the advantages of the hardware acceleration [14,23,24].…”

“…Computer architecture specialization has been established as the main driving factor for achieving better performance and energy efficiency in the current and upcoming high-performance machines. The viability of spatial architectures (and more specifically FPGAs) as mainstream hardware accelerators for computationally highdemanding applications has been already demonstrated by far, with some notable examples in the literature [14]. For instance, [15] analyzed algorithms largely used in the HPC context and found that 5 out of the 13 analyzed were suitable for being accelerated on FPGA devices, although the required knowledge for their porting clearly shows the need for a higher abstraction level.…”

Profile generation using the filtering technique for the fast motion and smooth performance in the hardware level of autonomous system

“…Furthermore, there arises a necessity to implement filtering techniques through hardware programming languages in order to uncover more significant accomplishments. Moreover, FPGA is garnering attention and emerging as a potentially energy-efficient platform candidate [50,51]. It demands less power and is commonly embedded within compact systems with limited memory capacity.…”

Special issue on Performance modeling, benchmarking, and simulation of high performance computing systems

“…Nguyen et al assess the performance of reconfigurable architectures for numerical simulations. 19 They evaluate the performance of FPGAs from Intel and Xilinx, and compare them to the Xeon, Xeon Phi and NVIDIA V100 architectures. Their work shows that while FPGAs typically struggle to compete in absolute terms, they require significantly less power, and can deliver nearly equivalent energy efficiency.…”

“…Nguyen et al assess the performance of reconfigurable architectures for numerical simulations 19 . They evaluate the performance of FPGAs from Intel and Xilinx, and compare them to the Xeon, Xeon Phi and NVIDIA V100 architectures.…”