2021 IEEE International Symposium on Smart Electronic Systems (iSES) 2021
DOI: 10.1109/ises52644.2021.00077
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FPGA based Implementation of Binarized Neural Network for Sign Language Application

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“…They generated IP using HLS for deployment on an FPGA to recognize MNIST handwritten digits. In the study [30], they created their own dataset, the Indian Sign Language (ISL) Alphabet Dataset, and used the PYNQ-Z2 board with limited resources to implement sign language recognition using the Binarized Neural Network (BNN). However, their accuracy reached only 85%, indicating room for improvement.…”
Section: Results and Analysismentioning
confidence: 99%
“…They generated IP using HLS for deployment on an FPGA to recognize MNIST handwritten digits. In the study [30], they created their own dataset, the Indian Sign Language (ISL) Alphabet Dataset, and used the PYNQ-Z2 board with limited resources to implement sign language recognition using the Binarized Neural Network (BNN). However, their accuracy reached only 85%, indicating room for improvement.…”
Section: Results and Analysismentioning
confidence: 99%