FPGA Based Logic Analyzer

Zet, Cristian; Foşalău, Cristian

doi:10.1109/icepe.2018.8559948

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Fast Constant Sampling1

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“…10(C)). There is a need to use the high sampling rate to obtain enough samples [38][39][40][41][42][43]. As a result, the peak detector will work correctly with a hard-defined error or amplitude underestimation, respectively.…”

Section: Fast Constant Samplingmentioning

confidence: 99%

Metrology and Measurement Systems

Achtenberg,

Mikołajczyk,

Szabra

et al. 2020

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The paper is a review of analog and digital electronics dedicated to monitor nanosecond pulses. Choosing the optimal peak detector construction depends on many factors for example precision, complexity, or costs. The work shows some virtues and limitations of selected peak detection methods, for example standard peak detector with rectifier, sample and hold circuit with triggering units and ADC fast acquisition. However, the main attention is paid to problems of results from effective triggering signal for sample and hold operation. The obtained results allow for designing a peak detector construction as an alternative for costly and very complex fast acquisition systems based on ADC and FPGA technologies.

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