FPGA-based network microburst analysis system with efficient packet capturing

Abstract

Network microbursts, which are bursts of traffic on the order of submilliseconds, have attracted much attention because they can cause network latency and packet loss. However, analyzing the causes of microbursts involves two problems: how to capture the packets contained in the microbursts and how to identify the flows that cause the microbursts. To solve these problems, we propose a microburst analysis system based on the field-programmable gate array (FPGA). This system uses dedicated hardware to detect microbursts with a submillisecond time resolution. By setting a static threshold for the overall traffic to be detected, the system can capture only packets before and after microburst detection is triggered. In addition, by setting a dynamic threshold for each flow, we can identify the flow that causes the microburst. On the basis of experimental results, we confirmed that our system can accurately identify the flows that cause microbursts by capturing only the packets before and after microburst detection, even in a network where bandwidth usage fluctuates with actual traffic conditions, on the basis of network trace data in a data center. The proposed system is implemented in an Intel PAC with an Arria 10 GX FPGA, which consumes a small amount of hardware resources.

Real-time Virtual-network-traffic-monitoring System with FPGA Accelerator

“…Figure 2 shows a block diagram of our system. The FPGA accelerator contains a packet receiver, packetheader analyzer, NTC, statistics aggregator, and microburst detector [11,12]. The packet receiver supports 10-Gigabit Ethernet.…”