FPGA-Based On-Board Hyperspectral Imaging Compression: Benchmarking Performance and Energy Efficiency against GPU Implementations

Abstract

Remote-sensing platforms, such as Unmanned Aerial Vehicles, are characterized by limited power budget and low-bandwidth downlinks. Therefore, handling hyperspectral data in this context can jeopardize the operational time of the system. FPGAs have been traditionally regarded as the most power-efficient computing platforms. However, there is little experimental evidence to support this claim, which is especially critical since the actual behavior of the solutions based on reconfigurable technology is highly dependent on the type of application. In this work, a highly optimized implementation of an FPGA accelerator of the novel HyperLCA algorithm has been developed and thoughtfully analyzed in terms of performance and power efficiency. In this regard, a modification of the aforementioned lossy compression solution has also been proposed to be efficiently executed into FPGA devices using fixed-point arithmetic. Single and multi-core versions of the reconfigurable computing platforms are compared with three GPU-based implementations of the algorithm on as many NVIDIA computing boards: Jetson Nano, Jetson TX2 and Jetson Xavier NX. Results show that the single-core version of our FPGA-based solution fulfils the real-time requirements of a real-life hyperspectral application using a mid-range Xilinx Zynq-7000 SoC chip (XC7Z020-CLG484). Performance levels of the custom hardware accelerator are above the figures obtained by the Jetson Nano and TX2 boards, and power efficiency is higher for smaller sizes of the image block to be processed. To close the performance gap between our proposal and the Jetson Xavier NX, a multi-core version is proposed. The results demonstrate that a solution based on the use of various instances of the FPGA hardware compressor core achieves similar levels of performance than the state-of-the-art GPU, with better efficiency in terms of processed frames by watt.

A Systematic Review of Hardware-Accelerated Compression of Remotely Sensed Hyperspectral Images

“…For instance, some studies use the misclassification rate, from which the classification accuracy can be obtained, as in [ 37 , 38 , 39 ]. Other studies [ 40 , 41 , 42 , 43 , 44 , 45 , 46 , 47 ] use the Spectral Angle Difference (SAD) while the Signal-to-Noise Ratio (SNR) is omnipresent in [ 44 , 48 , 49 , 50 , 51 ]. Further, the Peak Signal-to-Noise Ratio (PSNR) is adopted in [ 49 , 50 , 52 , 53 , 54 , 55 , 56 , 57 , 58 , 59 , 60 , 61 ].…”

Editorial to Special Issue “Remote Sensing Data Compression”

“…The paper "FPGA-Based On-Board Hyperspectral Imaging Compression: Benchmarking Performance and Energy Efficiency against GPU Implementations" by Julián Caba, María Díaz, Jesús Barba, Raúl Guerra, Jose A. de la Torre, and Sebastián López [10] proposes a highly optimized implementation using integer arithmetic of the lossy compression algorithm for hyperspectral image systems. The purpose is to comply with the high-frame requirement imposed by a UAV-based sensing platform.…”

A Heterogeneous Hardware Accelerator for Image Classification in Embedded Systems

“…However, they reach power consumptions of up to 200 W [ 21 ], making it difficult to use them in portable and mobile devices [ 22 ]. Embedded GPUs use custom acceleration, such as the Nvidia TensorRT environment in the Jetson family, to reduce power consumption compared to traditional GPUs [ 23 ], but their power consumption is still high compared to dedicated hardware solutions on reconfigurable hardware platforms such as field-programmable gate arrays (FPGAs) [ 24 ]. Dedicated hardware accelerators for neural networks, such as Google Coral [ 25 ], offer very good performance and power efficiency, but their architecture limits their programmability and the ability to dynamically retarget the hardware for other tasks in a video-processing pipeline.…”