FPGA based stereo imaging system with applications in computer gaming

Andorko, Istvan; Corcoran, Peter; Bigioi, Petronel

doi:10.1109/icegic.2009.5293586

Cited by 4 publications

(1 citation statement)

References 33 publications

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“…The Field Programmable Gate Array (FPGA) technology supplements a suitable framework for designing and implementing complex systems [1][2][3][4]. Thanks to the availability of one-to-one mapping and the spatial and temporal parallelism of the FPGAs, they are often used to implement real-time image processing applications [6][7][8][9][10]. One such application is the game code implementation on FPGAs such as Tetris [11], Connect6 [12][13], Blokus duo [14][15][16], Trax [17] and Pong [18][19].…”

Section: Introductionmentioning

confidence: 99%

VHDL İle Tam Gömülü Bi̇r Tetri̇s Oyunu Gerçekleşti̇rmesi̇

Polat¹

2020

Ömer Halisdemir Üniversitesi Mühendislik Bilimleri Dergisi

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In this paper, a Tetris game code which runs on an FPGA development and education board is synthesized. To this end, an original Tetris game code that works solely on the FPGA board is designed in VHDL hardware description language. The novelty of this design lies in the fact that the Tetris code does not use any SRAM modules for storage unlike other embedded Tetris implementations published to date. What is more, the code uses a tile-mapped scheme in which the code groups certain pixels as a tile. Thus, a 1-bit register is enough for the current value of all the pixels that fall in the tile which improves the speed of the code and simplifies the design procedure. The code is written using VHDL hardware description language. Though Altera DE0 development and education board is used for the implementation, thanks to the usage of only the standard VHDL functions, the code can run on any other FPGA boards.

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