FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter

Ekström, Rickard; Leijon, Mats

doi:10.1155/2013/713293

Cited by 14 publications

(4 citation statements)

References 25 publications

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“…The full field‐programmable gate array – real‐time (FPGA‐RT) control implementation for a grid‐connected VSI is described in [19]. The automatic tap change procedure described in Fig.…”

Section: Methodsmentioning

confidence: 99%

Fast solid‐state on‐load tap change using two current‐controlled voltage‐source inverters

Ekström

Thomas

Leijon

2014

IET Power Electronics

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A new topology for on-load tap change using two current-controlled voltage-source inverters is demonstrated. With this topology, no additional tap change circuitry is required. This configuration can be useful when optimising the power extraction from renewable energy sources, and may replace a DC/DC converter. It is possible to run the inverters in parallel for higher current capacity, or run them in series across the transformer to improve the harmonic output. The topology can be extended to any number of taps, adding one mechanical contactor per tap. The procedure for the tap change, including the control implementations to keep active and reactive grid power flows constant throughout the tap change, is described. Experimental results are presented to show the viability of the proposed topology. Tap changes are conducted on all phases simultaneously, and individually at each phase current zero-crossing. Variations in grid power are investigated for the two strategies. Also, a dead-time in the tap change is introduced to evaluate how control system delays will appear as grid power dips.

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Section: Methodsmentioning

confidence: 99%

Fast solid‐state on‐load tap change using two current‐controlled voltage‐source inverters

Ekström

Thomas

Leijon

2014

IET Power Electronics

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“…In particular the 3-D SVPWM algorithm requires a coordinate transformation for the formulation in the αβγ frame, hence it has higher computational cost [23]. In addition both of the abc to dq0 transforms make use of a phase angle supplied by a PLL which tracks the grid phase as shown in Fig.5 (a) and this PLL introduces a further delay [24] in the response for SST2. In comparison SST1 displays a fast startup and transient response with lower overshoot.…”

Section: ) Efficiency Comparisonmentioning

confidence: 99%

Performance of solid state transformers under imbalanced loads in distribution systems

Yang

Meere

O’Loughlin

et al. 2016

2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

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This paper will compare the performance of two solid state transformer (SST) topologies in terms of their ability to deal with load imbalance in a four wire power distribution system. The topologies studied consist of an SST with a basic three phase output stage with three separate decoupled phases, and a topology with a four leg inverter output stage. Experimental validation of the control approach for the four leg inverter has been performed. It is shown that both topologies can maintain output voltage balance in the face of significant load imbalance, although the SST with three decoupled phases is best at maintaining output voltage balance. However because of the larger number of switches used it has lower efficiency than the other topologies. The four leg inverter topology is also shown to maintain good output voltage balance while having a lower number of switches and lower loss. Hence this topology presents a better a compromise between performance and efficiency.

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“…The RTL level verification and implementation are done using the synthesise tool Xilinx ISE 13.2. Then the designed architecture is configured to the Spartan-6 FPGA (XC6SLX45) device [25][26][27]. The functionality of each block in the architecture is simulated thoroughly using the Modelsim software.…”

Section: Simulation Studymentioning

confidence: 99%

Intensive random carrier pulse width modulation for induction motor drives based on hopping between discrete carrier frequencies

Sivarani¹,

Jawhar²,

Kumar³

2016

IET Power Electronics

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The existing random carrier pulse-width modulation (RCPWM) schemes result in poor non-deterministic characteristics. They basically use a single-frequency triangular carrier and its inverted version to synthesise the random carrier by a pseudo-random binary sequence (PRBS) bit selector. Even though the bits are highly random in nature with large pattern repetition rate, the resulting random carrier does not possess required level of randomness. Rather it can make slight positional variation in the resulting PWM pulses. Moreover, the harmonic spreading effects of these randomness may not be sufficient to meet the expectations of modern drives. Hence, this study proposes a multiple carriers based RCPWM (MCBRCPWM) scheme for the voltage-source inverter fed induction motor drive to enhance the harmonic power spreading ability of the modulator. The proposed MCBRCPWM scheme utilises the nondeterministic characteristics of both the PRBS and hopping action between the MCs involved. The simulation results using MATLAB 7.1.0 (2010a)-Simulink software and the experimental results with hardware implemented using XC6SLX45 field programmable gate array for a 3Ø squirrel cage induction motor load prove the excellent harmonic spectra spreading capability of the proposed scheme as compared with existing non-deterministic methods.

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FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter

Cited by 14 publications

References 25 publications

Fast solid‐state on‐load tap change using two current‐controlled voltage‐source inverters

Fast solid‐state on‐load tap change using two current‐controlled voltage‐source inverters

Performance of solid state transformers under imbalanced loads in distribution systems

Intensive random carrier pulse width modulation for induction motor drives based on hopping between discrete carrier frequencies

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