FPGA Implementation of a Tone-Based Flight Termination System in a Software-Defined Radio Platform

Panda, Amiya Ranjan; Mishra, Debahuti; Ratha, Hare Krishna

doi:10.1109/tii.2017.2709344

Cited by 6 publications

(2 citation statements)

References 19 publications

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“…In 2016, Wang et al adopted FPGA as the hardware prototype of a deep learning accelerator unit (DLAU), which is suitable for large deep learning networks due to its scalable architecture. 22 In 2017, Panda et al 23 designed and implemented an innovative NI Flex-RIObased flight termination system (FTS) on a softwaredefined radio (SDR) platform. In 2018, Lucia et al 24 optimized the implementation of model predictive control (MPC) on FPGAs using advanced synthesis tools and automatic code generation.…”

Section: Fpgamentioning

confidence: 99%

A field-programmable gate array system for sonar image recognition based on convolutional neural network

Wang

Jiang

Wang

et al. 2020

Proceedings of the Institution of Mechanical Engineers, Part I:

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Subsea pipeline is the safest, most reliable, and most economical way to transport oil and gas from an offshore platform to an onshore terminal. However, the pipelines may rupture under the harsh working environment, causing oil and gas leakage. This calls for a proper device and method to detect the state of subsea pipelines in a timely and precise manner. The autonomous underwater vehicle carrying side-scan sonar offers a desirable way for target detection in the complex environment under the sea. As a result, this article combines the field-programmable gate array, featuring high throughput, low energy consumption and a high degree of parallelism, and the convolutional neural network into a sonar image recognition system. First, a training set was constructed by screening and splitting the sonar images collected by sensors, and labeled one by one. Next, the convolutional neural network model was trained by the set on the workstation platform. The trained model was integrated into the field-programmable gate array system and applied to recognize actual datasets. The recognition results were compared with those of the workstation platform. The comparison shows that the computational precision of the designed field-programmable gate array system based on convolutional neural network is equivalent to that of the workstation platform; however, the recognition time of the designed system can be saved by more than 77%, and its energy consumption can also be saved by more than 96.67%. Therefore, our system basically satisfies our demand for energy-efficient, real-time, and accurate recognition of sonar images.

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Section: Fpgamentioning

confidence: 99%

A field-programmable gate array system for sonar image recognition based on convolutional neural network

Wang

Jiang

Wang

et al. 2020

Proceedings of the Institution of Mechanical Engineers, Part I:

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“…Software defined radio (SDR) is a vast and emerging field in which the designed radio transmitting systems have some or all of their physical layer processing subsystems controlled by the software. For the purpose of programmability and reconfigurability, field programmable gate arrays (FPGAs) are becoming the preferred platform for implementing most of the SDR concepts [4,15,22]. SDR requires the design of various technologies such as antenna, RF, IF, and digital baseband subsystems.…”

Section: Introductionmentioning

confidence: 99%

Design of interfaces between high speed data converters and high performance FPGAs for software defined radio applications

et al. 2019

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Software defined radio (SDR) is a vast and emerging field that requires the design of various technologies such as antenna, RF, IF, and digital baseband subsystems. Among all these technologies, data converters that convert signals between analog and digital domains are highly crucial. On the other hand field programmable gate arrays (FPGAs) based platforms are being preferred for evaluating and implementing the digital communication concepts due to their programmability and reconfigurability. As a result they are well suited for the design of SDR technology. In this research work, we develop a platform where high-speed data converters are interfaced with high performance FPGAs. Interfaces are designed for analogto-digital convertors (ADC) and digital-to-analog convertors (DAC) to communicate with FPGAs. For the interface design between ADC and FPGA, a double data rate and a low voltage differential signalling based serial output is adopted. And, for the interface design between DAC and other FPGA, parallel complementary metal oxide semiconductor outputs are used. To reconfigure the modes and parameters of the data convertors, serial peripheral interface data controllers have been designed. We have through simulations evaluated the performance of our designed interfaces between data convertors and FPGAs.

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FPGA Implementation of Range Safety Panel for Flight Termination System using LabVIEW

Gourab

Mandal

Roy

2023

2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT)

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FPGA Implementation of a Tone-Based Flight Termination System in a Software-Defined Radio Platform

Cited by 6 publications

References 19 publications

A field-programmable gate array system for sonar image recognition based on convolutional neural network

A field-programmable gate array system for sonar image recognition based on convolutional neural network

Design of interfaces between high speed data converters and high performance FPGAs for software defined radio applications

FPGA Implementation of Range Safety Panel for Flight Termination System using LabVIEW

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