2023 Fifth International Conference on Electrical, Computer and Communication Technologies (ICECCT) 2023
DOI: 10.1109/icecct56650.2023.10179840
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FPGA Implementation of High Speed Convolutional Encoder and Viterbi Decoder for Software Defined Radio

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“…During our initial implementation of the FPGA using HLS, we encountered a long latency issue with the Viterbi algorithm [35], [36], which was not acceptable for realtime signal processing. The Viterbi algorithm is a widely used decoding technique in digital communication systems, particularly for decoding convolutional codes.…”
Section: Methodsmentioning
confidence: 99%
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“…During our initial implementation of the FPGA using HLS, we encountered a long latency issue with the Viterbi algorithm [35], [36], which was not acceptable for realtime signal processing. The Viterbi algorithm is a widely used decoding technique in digital communication systems, particularly for decoding convolutional codes.…”
Section: Methodsmentioning
confidence: 99%
“…11 shows a general flowchart of the Viterbi algorithm (from Fig. 2 of [36]). It works by constructing a trellis diagram to represent all possible sequences of coded bits ('Initialize' in Fig.…”
Section: Methodsmentioning
confidence: 99%