FPGA implementation of high speed serial peripheral interface for motion controller

Noor, Nurqamarina Binti Mohd; Saparon, Azilah

doi:10.1109/isiea.2012.6496676

Cited by 4 publications

(1 citation statement)

References 7 publications

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“…According to their research, as compared to non-gated architecture, gated clock architecture significantly reduces dynamic power dissipation and latency. SPI is used, according to Mohd Noor and A. Saparon [5], to transport data between integrated components in motion controllers. Unlike earlier SPI designs that could only handle continuous data transfer, this one is made to function in three major data transfer modes: burst, interleave, and continuous.…”

Section: Introductionmentioning

confidence: 99%

FPGA Implementation of SPI Protocol

Nalina H D

2024

IJTRET

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Field Programmable Gate Array (FPGA) are versatile devices that can be programmed to implement various digital circuits, including communication protocols like Serial Peripheral Interface (SPI). The Serial peripheral interface protocol is a synchronous serial communication interface that allows for full duplex communication between a master device and a multiple slave MOSI, MISO, SCLK, and SS. MOSI and MISO are data lines, while SCLK is the clock signal generated by the master to synchronize transfers. SS is used by the master to select individual slave devices. By implementing the SPI protocol in FPGA, to gain flexibility and customization, as FPGAs can be reprogrammed for different applications without the need for dedicated hardware changes. The FPGA implementation of the Serial Peripheral Interface (SPI) protocol involves a structured methodology. With the help of pipeline buffer and DAM technique power dissipation is performed effectively. Finally, integrate the FPGA SPI module into the larger system, ensuring seamless communication with other components or microcontrollers. This systematic approach ensures a reliable and tailored FPGA based SPI implementation.

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Section: Introductionmentioning

confidence: 99%