FPGA implementation of LDPC decoder for 5G NR with parallel layered architecture and adaptive normalization

Katyushnyj, Alexandr; Krylov, Aleksei; Rashich, Andrey; Zhang, Chao; Peng, Kewu

doi:10.1109/eexpolytech50912.2020.9243997

Cited by 19 publications

(14 citation statements)

References 9 publications

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“…The hybrid decoding algorithm emerges as a pivotal innovation in the landscape of 5G communication, specifically designed to enhance the performance of LDPC decoders. This algorithm ingeniously synthesizes the strengths of two well-established decoding techniques, namely, the BP and the Min-Sum (MS) algorithms, to address the twin imperatives of decoding efficacy and computational efficiency that are critical for the next generation of wireless networks [17].…”

Section: Hybrid Decoding Algorithmmentioning

confidence: 99%

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Enhancing 5G LTE Communications: A Novel LDPC Decoder for Next-Generation Systems

Venkatesh,

Mallikarjunaiah,

Srikantaswamy

et al. 2024

IDA

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The advent of fifth-generation (5G) long-term evolution (LTE) technology represents a critical leap forward in telecommunications, enabling unprecedented high-speed data transfer essential for today's digital society. Despite the advantages, the transition introduces significant challenges, including elevated bit error rate (BER), diminished signal-to-noise ratio (SNR), and the risk of jitter, undermining network reliability and efficiency. In response, a novel low-density parity check (LDPC) decoder optimized for 5G LTE applications has been developed. This decoder is tailored to significantly reduce BER and improve SNR, thereby enhancing the performance and reliability of 5G communications networks. Its design accommodates advanced switching and parallel processing capabilities, crucial for handling complex data flows inherent in contemporary telecommunications systems. A distinctive feature of this decoder is its dynamic adaptability in adjusting message sizes and code rates, coupled with the augmentation of throughput via reconfigurable switching operations. These innovations allow for a versatile approach to optimizing 5G networks. Comparative analyses demonstrate the decoder's superior performance relative to the quasi-cyclic low-density check code (QCLDC) method, evidencing marked improvements in communication quality and system efficiency. The introduction of this LDPC decoder thus marks a significant contribution to the evolution of 5G networks, offering a robust solution to the pressing challenges faced by next-generation communication systems and establishing a new standard for high-speed wireless connectivity.

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Section: Hybrid Decoding Algorithmmentioning

confidence: 99%

“…The Shannon channel coding theorem in information theory is understood to have endorsed the development of error control codes [17][18][19]. It states that all the data rates much less than the channel capacity may be done with an arbitrarily small chance of error, which is given by the Shannon-Hartley Eq.…”

Section: Shannon Channel Coding Theoremmentioning

confidence: 99%

Enhancing 5G LTE Communications: A Novel LDPC Decoder for Next-Generation Systems

Venkatesh,

Mallikarjunaiah,

Srikantaswamy

et al. 2024

IDA

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“…Rate-adaptive LDPC codes are created in [12]- [14] which are indicated with the help of mother matrix, and it also includes an array of circularly shifted identity sub-matrices. By deleting the highest rows from the mother matrix, the parity-check matrices of daughter codes with higher levels are obtained i.e., by row-deleting approach, the rates are adapted.…”

Section: Comparative Analysis Of Rate-compatible Code and Rate-adapti...mentioning

confidence: 99%

An efficient reconfigurable code rate cooperative low-density parity check codes for gigabits wide code encoder/decoder operations

Venkatesh,

Mallikarjunaiah,

Srikantaswamy

2023

IJECE

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In recent days, extensive digital communication process has been performed. Due to this phenomenon, a proper maintenance of authentication, communication without any overhead such as signal attenuation code rate fluctuations during digital communication process can be minimized and optimized by adopting parallel encoder and decoder operations. To overcome the above-mentioned drawbacks by using proposed reconfigurable code rate cooperative (RCRC) and low-density parity check (LDPC) method. The proposed RCRC-LDPC is capable to operate over gigabits/sec data and it effectively performs linear encoding, dual diagonal form, widens the range of code rate and optimal degree distribution of LDPC mother code. The proposed method optimize the transmission rate and it is capable to operate on 0.98 code rate. It is the highest upper bounded code rate as compared to the existing methods. The proposed method optimizes the transmission rate and is capable to operate on a 0.98 code rate. It is the highest upper bounded code rate as compared to the existing methods. the proposed method's implementation has been carried out using MATLAB and as per the simulation result, the proposed method is capable of reaching a throughput efficiency greater than 8.2 (1.9) gigabits per second with a clock frequency of 160 MHz.

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“…The Vivado tool reports a total on-chip power of 5.897W. After Making a comparison between our results with another LDPC architectures in [22], [23], and [24]. In [22], used the Xilinx Kintex-VII architecture.…”

Section: Comparative Analysis Between Various Fpgas Devicesmentioning

confidence: 99%

FPGA Implementation of 5G NR LDPC Codes

Abdel-Momen,

Zekry,

Hassan

et al. 2023

Adv. sci. technol. eng. syst. j.

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As a result of rising expectations for quality, the employment of advanced technical requirements for future fifth-generation (5G) new radio is required. The error-correction coding method is one of the most important components of a new generation. The 5G NR New Radio Low-Density Parity Check (LDPC) codes, which have been adopted by the 5G standard, are a standout solution in terms of high coding gain, high throughput, and low power dissipation. This paper presents an implementation of 5th generation (5G) New Radio (NR) and 5G NR low-density parity check codes, which are performed with the aid of a proper architecture. LABVIEW will be used in wireless communications to reduce the cost, space, and power. Simultaneously, this increased the speed. The circuit design supports a constraint length of 1360 and a code rate of 0.5. The LDPC encoder and decoder are implemented on an NI MY RIO 1900 ZYNQ FPGA at a 33 MHZ core frequency starter kit. Xilinx Vivado 18.2 series was used for the simulation. The implemented design shows an area overhead reduction of 50% compared with the referenced designs of the Xilinx 7 series device. In MY RIO ZYNQ, the proposed method achieved 21000 LUTs compared with Xilinx 7-series solutions, and it has a much higher throughput (224 vs. 87 and 5 MBit/s), followed by MY RIO ZYNQ, which is better than previous state-of-the-art solutions in terms of area and higher data rates. Moreover, the implemented 5G NR LDPC decoder tested against an additive white Gaussian noise channel (AWGN) and consequently has gained more popularity in many applications.

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FPGA implementation of LDPC decoder for 5G NR with parallel layered architecture and adaptive normalization

Cited by 19 publications

References 9 publications

Enhancing 5G LTE Communications: A Novel LDPC Decoder for Next-Generation Systems

Enhancing 5G LTE Communications: A Novel LDPC Decoder for Next-Generation Systems

An efficient reconfigurable code rate cooperative low-density parity check codes for gigabits wide code encoder/decoder operations

FPGA Implementation of 5G NR LDPC Codes

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