FPGA implementation of low-power 3D ultrasound beamformer

Sampson, Richard J.; Yang, Ming; Wei, Siyuan; Jintamethasawat, Rungroj; Fowlkes, J. Brian; Kripfgans, Oliver D.; Chakrabarti, Chaitali; Wenisch, Thomas F.

doi:10.1109/ultsym.2015.0514

Cited by 8 publications

(4 citation statements)

References 5 publications

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“…For example, Sonic Millip3De [45], [46] implements ultra-fast imaging for 128×96 transducer elements (of which only 1024 are considered per shot) with a powerful die-stacked package. Its main bottleneck is that it requires an external DRAM memory to store beamforming delay coefficients, and several GB/s of memory bandwidth.…”

Section: Previous Workmentioning

confidence: 99%

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging

Ibrahim

Hager

Bartolini

et al. 2017

IEEE Trans. Biomed. Circuits Syst.

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Abstract-Ultrasound imaging is a reference medical diagnostic technique thanks to its blend of versatility, effectiveness and moderate cost. The core computation of all ultrasound imaging methods is based on simple formulae, except for those required to calculate delays with high precision and throughput. Unfortunately, advanced 3D systems require the calculation or storage of billions of such delay values per frame, which is a challenge. In 2D systems, this requirement can be four orders of magnitude lower, but efficient computation is still crucial in view of low-power implementations that can be battery-operated, enabling usage in rescue scenarios.In this paper we explore two smart designs of the delay generation function. To quantify their hardware cost, we implement them on FPGA and study their footprint and performance. We evaluate how these architectures scale to different ultrasound applications, from a low-power 2D system to a next-generation 3D machine. When using numerical approximations, we demonstrate the ability to generate delay values with sufficient throughput to support 10000-channel 3D imaging at up to 30 fps while using 63% of a Virtex 7 FPGA, requiring 24 MB of external memory accessed at about 32 GB/s bandwidth. Alternatively, with similar FPGA occupation, we show an exact calculation method that reaches 24 fps on 1225-channel 3D imaging and does not require external memory at all. Both designs can be scaled to use a negligible amount of resources for 2D imaging in low-power applications, and for ultrafast 2D imaging at hundreds of frames per second.

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Section: Previous Workmentioning

confidence: 99%

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging

Ibrahim

Hager

Bartolini

et al. 2017

IEEE Trans. Biomed. Circuits Syst.

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show abstract

“…With this index, the contributing sample is selected and summed with matching samples from other channels to obtain the pixel value. Computationally expensive floating-point operations such as the trigonometric and square root functions, multiplication, and division are needed when calculating the indices [50] and calculating these on the fly degrades the system performance. It is preferred to calculate the indices beforehand, store them on the FPGA, and read them directly in operation.…”

Section: Methodsmentioning

confidence: 99%

An FPGA-Based Backend System for Intravascular Photoacoustic and Ultrasound Imaging

Sanders

Zhang

et al. 2019

IEEE Trans. Ultrason., Ferroelect., Freq. Contr.

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The integration of intravascular ultrasound (IVUS) and intravascular photoacoustic (IVPA) imaging produces an imaging modality with high sensitivity and specificity which is particularly needed in interventional cardiology. Conventional side-looking IVUS imaging with a single-element ultrasound (US) transducer lacks forward-viewing capability, which limits the application of this imaging mode in intravascular intervention guidance, Doppler-based flow measurement, and visualization of nearly or totally blocked arteries. For both side-looking and forward-looking imaging, the necessity to mechanically scan the US transducer limits the imaging frame rate, and therefore array-based solutions are desired. In this paper, we present a low-cost, compact, high-speed, and programmable imaging system based on a field-programmable gate array (FPGA) suitable for dual-mode forward-looking IVUS/IVPA imaging. The system has 16 US transmit and receive channels and functions in multiple modes including interleaved photoacoustic (PA) and US imaging, hardware-based high-frame-rate US imaging, software-driven US imaging, and velocity measurement. The system is implemented in the register-transfer level, and the central system controller is implemented as a finite state machine. The system was tested with a capacitive micromachined ultrasonic transducer (CMUT) array. A 170-frames-per-second (FPS) US imaging frame rate is achieved in the hardware-based high-frame-rate US imaging mode while the interleaved PA and US imaging mode operates at a 60-FPS US and a laser-limited 20-FPS PA imaging frame rate. The performance of the system benefits from the flexibility and efficiency provided by low-level implementation. The resulting system provides a convenient backend platform for research and clinical IVPA and IVUS imaging.

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“…The advanced research platform SARUS [39] supports 1024 receive channels, the highest count supported by any single 3D system, but requires 320 FPGAs. The Sonic Millip3De system [40], [41], that performs ultra-fast imaging, uses 128 × 96 probe elements -but only 1024 channels are considered per shot -with a powerful die-stacked package. However, its main bottleneck is the required external DRAM memory to store the BF delay coefficients, with the need of several GB/s memory bandwidth.…”

Section: Previous Workmentioning

confidence: 99%

Towards Ultrasound Everywhere: A Portable 3D Digital Back-End Capable of Zone and Compound Imaging

Ibrahim

Zhang

Angiolini

et al. 2018

IEEE Trans. Biomed. Circuits Syst.

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Ultrasound imaging is a ubiquitous diagnostic technique, but does not fit the requirements of the telemedicine approach, because it relies on the real-time manipulation and image recognition skills of a trained expert, called sonographer. Sonographers are only available in hospitals and clinics, negating or at least delaying access to ultrasound scans in many locales-rural areas, developing countries-as well as in medical rescue operations. Telesonography would require an advanced imager that supports three-dimensional (3-D) acquisition; this would allow untrained operators to acquire broad scans and upload them remotely for diagnosis. Such advanced imagers do exist, but do not meet several other requirements for telesonography, such as being portable, inexpensive, and sufficiently low power to enable battery operation. In this work, we present our prototype of the first portable 3-D digital ultrasound back-end system. The prototype is implemented in a single midrange Xilinx field programmable gate array (FPGA), for an estimated power consumption of 5 W. The device supports up to 1024 input channels, which is state of the art and could be scaled further, and supports multiple image reconstruction modes. We evaluate the resource utilization of the FPGA and provide various quality metrics to ascertain the output image quality.

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FPGA implementation of low-power 3D ultrasound beamformer

Cited by 8 publications

References 5 publications

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging

Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging

An FPGA-Based Backend System for Intravascular Photoacoustic and Ultrasound Imaging

Towards Ultrasound Everywhere: A Portable 3D Digital Back-End Capable of Zone and Compound Imaging

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