FPGA implementation of scale invariant feature transform

Rekha, S S; Pavitra, Y J; Mishra, Prabhakar

doi:10.1109/microcom.2016.7522483

Cited by 2 publications

(1 citation statement)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The implementation of feature descriptors in the FPGAs remains an active research topic in recent years. Several works on fully pipelined FPGA accelerators for SIFT have been published since 2016 [30][31][32][33]. A parallel hardware architecture for SIFT was also reported in Reference [34].…”

Section: Comparison With Other Implementationsmentioning

confidence: 99%

Optimization and Implementation of Synthetic Basis Feature Descriptor on FPGA

2020

View full text Add to dashboard Cite

Feature detection, description, and matching are crucial steps for many computer vision algorithms. These steps rely on feature descriptors to match image features across sets of images. Previous work has shown that our SYnthetic BAsis (SYBA) feature descriptor can offer superior performance to other binary descriptors. This paper focused on various optimizations and hardware implementation of the newer and optimized version. The hardware implementation on a field-programmable gate array (FPGA) is a high-throughput low-latency solution which is critical for applications such as high-speed object detection and tracking, stereo vision, visual odometry, structure from motion, and optical flow. We compared our solution to other hardware designs of binary descriptors. We demonstrated that our implementation of SYBA as a feature descriptor in hardware offered superior image feature matching performance and used fewer resources than most binary feature descriptor implementations.

show abstract

Section: Comparison With Other Implementationsmentioning

confidence: 99%

Optimization and Implementation of Synthetic Basis Feature Descriptor on FPGA

2020

View full text Add to dashboard Cite

show abstract

Results and Discussions of Palm-Dorsa-Veins-Based Systems in the Cloud IoT-Based M-Health Environment

2021

Cloud-Based M-Health Systems for Vein Image Enhancement and Feature Extraction

View full text Add to dashboard Cite

The results of palm-dorsa-veins-based m-health systems in a cloud-computing environment are discussed and analyzed in a detailed way in this chapter of the book. The sample images S1, S2, S3, and S4 are being used for hardware designs and performance evaluation in the cases of re-sampling, segmentation, median filters, thinning and Top veins, which will be used for critically ill and general patients' identity verification in the cloud IoT-based m-health environments. The ModelSim-Altera hardware design language is used as a simulator tool to simulate the hardware design with sample veins images. Further, the ModelSim-Altera simulation outcomes are compared with MATLAB implementations for evaluating the performances of hardware designs of the described algorithms in the cloud IoT-based m-health environment. The outcomes are analyzed, and the details of these outcomes are discussed in this chapter.

show abstract

FPGA implementation of scale invariant feature transform

Cited by 2 publications

References 21 publications

Optimization and Implementation of Synthetic Basis Feature Descriptor on FPGA

Optimization and Implementation of Synthetic Basis Feature Descriptor on FPGA

Results and Discussions of Palm-Dorsa-Veins-Based Systems in the Cloud IoT-Based M-Health Environment

Contact Info

Product

Resources

About