FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing

Abstract

In most of the real time video processing applications, cameras are used to capture live video with embedded systems/Field Programmable Gate Arrays (FPGAs) to process and convert it into the suitable format supported by display devices. In such cases, the interface between the camera and display device plays a vital role with respect to the quality of the captured and displayed video, respectively. In this paper, we propose an efficient FPGA-based low cost Complementary Metal Oxide Semiconductor (CMOS) camera interfacing architecture for live video streaming and processing applications. The novelty of our work is the design of optimised architectures for Controllers, Converters, and several interfacing blocks to extract and process the video frames in real time efficiently. The flexibility of parallelism has been exploited in the design for Image Capture and Video Graphics Array (VGA) Generator blocks. The Display Data Channel Conversion block required for VGA to High Definition Multimedia Interface Conversion has been modified to suit our objective by using optimised Finite State Machine and Transition Minimiszed Differential Signalling Encoder through the use of simple logic architectures, respectively. The hardware utilization of the entire architecture is compared with the existing one which shows that the proposed architecture requires nearly 44% less hardware resources than the existing one.This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

An FPGA Implementation of Basic Video Processing and Timing Analysis for Real-Time Application

“…A hardware architecture was proposed by Sarkar et al [25] to link an FPGA to a low-cost digital camera for realtime video processing and recording. Simple logic architectures have been used to implement the Transition Minimized Differential Signaling Encoder (Converter), the optimized Finite State Machine (Controllers), and several interfacing blocks.…”

FPGA-Based Pedestrian Detection for Collision Prediction System

“…This slave approach is only possible because all modules can operate without interrupting the input flow of pixels. This feature allows the PD system to easily integrate through digital pins in hardware cameras that use a serial protocol [28].…”

Design of car audio and video synchronization algorithm based on neural network model

“…This method can keep the code rate stable, but the video quality will still decrease due to error accumulation, which will lead to the incorrect extraction of audio information. In order to avoid a great impact on video quality, Sarkar et al proposed an audio embedding algorithm based on inter-frame prediction mode, but the embedding data capacity of this algorithm is small, with only 2 bits per macroblock 8 . Civera et al put forward a method of embedding audio coded data in variable size blocks, which embeds 2.56bit data in each macro block on average, which improves the embedding capacity and ensures the accuracy of audio data 9 .…”