Fractional-Order Dual-Slope Integral Fast Analog-to-Digital Converter with High Sensitivity

Bo, Yu; Pu, Yi-Fei; He, Qiu-Yan

doi:10.1142/s0218126620500838

Cited by 7 publications

(1 citation statement)

References 33 publications

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“…Fractional calculus, a branch of mathematics, has been widely implemented in the various fields of science and engineering [1][2][3]. Although it typically has a constant order, its application in describing new phenomena and problems with an operational order dependent on variables such as time and space is difficult.…”

Section: Introductionmentioning

confidence: 99%

Circuit Implementation of Variable-Order Scaling Fractal-Ladder Fractor with High Resolution

et al. 2022

Fractal Fract

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Extensive research has been conducted on the scaling fractal fractor using various structures. The development of high-resolution emulator circuits to achieve a variable-order scaling fractal fractor with high resolution is a major area of interest. We present a scaling fractal-ladder circuit for achieving high-resolution variable-order fractor based on scaling expansion theory using a high-resolution multiplying digital-to-analog converter (HMDAC). Firstly, the circuit configuration of variable-order scaling fractal-ladder fractor (VSFF) is designed. A theoretical demonstration proves that VSFF exhibits the operational characteristics of variable-order fractional calculus. Secondly, a programmable resistor–capacitor series circuit and universal electronic component emulators are developed based on the HMDAC to adjust the resistance and capacitance in the circuit configuration. Lastly, the model, component parameters, approximation performance, and variable-order characteristics are analyzed, and the circuit is physically implemented. The experimental results demonstrate that the circuit exhibits variable-order characteristics, with an operational order ranging from −0.7 to −0.3 and an operational frequency ranging from 7.72Hz to 4.82kHz. The peak value of the input signal is 10V. This study also proposes a novel method for variable-order fractional calculus based on circuit theory. This study was the first attempt to implement feasible high-resolution continuous variable-order fractional calculus hardware based on VSFF.

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Section: Introductionmentioning

confidence: 99%

Circuit Implementation of Variable-Order Scaling Fractal-Ladder Fractor with High Resolution

et al. 2022

Fractal Fract

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Time response optimal rational approximation: Improvement of time responses of MSBL based approximate fractional order derivative operators by using gradient descent optimization

Köseoğlu

2022

Engineering Science and Technology, an International Journal

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A field programmable gate array based high speed real-time weak periodic signal detection technique

Shen

Liu

et al. 2021

Review of Scientific Instruments

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The detection of a high repetition rate weak signal is studied in this paper. Owing to the characteristics of the signal of interest, both high speed analog-to-digital converter (ADC) and low computational complexity data processing techniques are required for high speed real-time weak signal detection. In this paper, a novel field programmable gate array (FPGA) based high speed real-time periodic weak signal detection technique is presented. Cascaded comparators outside the FPGA and cascaded flip flops in the FPGA are used to implement a one-bit ADC, which performs quantization first followed by sampling. Based on this novel design, a time-interleaved structure with several sub-channels is further proposed to significantly improve the sampling rate of the one-bit ADC, which does not require calibration for offset, gain, and sample-time mismatches between sub-channels. Each sub-channel has a long-time coherent integration structure to coherently integrate the sampled one-bit data. A full layer clearance mechanism that only operates on specific bits of the integrated sums is proposed to overcome the influence of a noise baseline drift on the weak signal detection. Compared with the traditional adaptive threshold, this mechanism has a significantly lower computational complexity. A prototype with three sub-channels performing 1.5 Gs/s sampling is implemented to verify the proposed technique. The results obtained confirm its high sampling rate and noise baseline drift tolerance in weak signal detection.

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Fractional-Order Dual-Slope Integral Fast Analog-to-Digital Converter with High Sensitivity

Cited by 7 publications

References 33 publications

Circuit Implementation of Variable-Order Scaling Fractal-Ladder Fractor with High Resolution

Circuit Implementation of Variable-Order Scaling Fractal-Ladder Fractor with High Resolution

Time response optimal rational approximation: Improvement of time responses of MSBL based approximate fractional order derivative operators by using gradient descent optimization

A field programmable gate array based high speed real-time weak periodic signal detection technique

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