Fractional order integrator/differentiator: FPGA implementation and FOPID controller application

Tolba, Mohamed F.; AboAlNaga, BahaaAlDeen M.; Said, Lobna A.; Madian, Ahmed H.; Radwan, Ahmed G.

doi:10.1016/j.aeue.2018.10.007

Cited by 46 publications

(28 citation statements)

References 26 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Many interesting solutions of two-port interconnections have been presented as parts of various fractional-order controllers [10][11][12][13][14][15][16][17][18]. Many of them are using standard topologies based on OA [10,11] because of their simplicity.…”

Section: Sum Of Reconfigurable Filtering Responsesmentioning

confidence: 99%

“…Frequency responses influenced by the fractional-order behavior of used components are studied more frequently in recent years [1]. Many works in this field focus on novel solutions of integral and derivative two-ports (for example [2][3][4][5][6][7][8][9]), proportional integral and derivative controllers (for example [10][11][12][13][14][15][16][17][18] and so-called bilinear two ports [8,9,[19][20][21] serving for various purposes. Two ports, known as integrators and differentiators, have started to be interesting for designers of fractional-order systems, and especially for proportional, integral and derivative controllers (PIDs).…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Integer-and Fractional-Order Integral and Derivative Two-Port Summations: Practical Design Considerations

et al. 2019

View full text Add to dashboard Cite

This paper targets on the design and analysis of specific types of transfer functions obtained by the summing operation of integer-order and fractional-order two-port responses. Various operations provided by fractional-order, two-terminal devices have been studied recently. However, this topic needs to be further studied, and the topologies need to be analyzed in order to extend the state of the art. The studied topology utilizes the passive solution of a constant-phase element (with order equal to 0.5) implemented by parallel resistor–capacitor circuit (RC) sections operating as a fractional-order two-port. The integer-order part is implemented by operational amplifier-based lossless integrators and differentiators in branches with electronically adjustable gain, useful for time constant tuning. Four possible cases of the fractional-order and integer-order two-port interconnections are analyzed analytically, by PSpice simulations and also experimentally in the frequency range between 10 Hz and 1 MHz. Standard discrete active components are used in this design for laboratory verification. Practical recommendations for construction and also particular solutions overcoming possible issues with instability and DC offsets are also given. Experimental and simulated results are in good agreement with theory.

show abstract

Section: Sum Of Reconfigurable Filtering Responsesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Integer-and Fractional-Order Integral and Derivative Two-Port Summations: Practical Design Considerations

et al. 2019

View full text Add to dashboard Cite

show abstract

“…In this paper, we only study the CMPS of FOCCS theoretically but do not study hardware implementation. Recently, there are many papers considering the implementation of the fractional-order operator and fractional-order synchronization scheme [40][41][42][43], which provide good research ideas for the implementation of the CMPS proposed in this paper. Therefore, we will further investigate the hardware implementation of the CMPS of FOCCS in future work.…”

Section: Remarkmentioning

confidence: 99%

Synchronization of Fractional-Order Complex Chaotic Systems Based on Observers

Xia

Jiang

2019

Entropy

View full text Add to dashboard Cite

By designing a state observer, a new type of synchronization named complex modified projective synchronization is investigated in a class of nonlinear fractional-order complex chaotic systems. Combining stability results of the fractional-order systems and the pole placement method, this paper proves the stability of fractional-order error systems and realizes complex modified projective synchronization. This method is so effective that it can be applied in engineering. Additionally, the proposed synchronization strategy is suitable for all fractional-order chaotic systems, including fractional-order hyper-chaotic systems. Finally, two numerical examples are studied to show the correctness of this new synchronization strategy.

show abstract

“…Purohit and Buch introduced a realistic case study of parallel compressor train load allocation optimization, which was also used to validate the analytical findings [17]. In addition, research has been conducted recently for improving network communication performance, such as integrating code scheduling, memory allocation, and access optimization [18], optimizing data packet size in generic sensor networks [19,20], and nonlinear controllers [21,22]. For example, an efficient hardware implementation of the Grünwald-Letnikov fractional order Proportional Integral Derivative (PID) was proposed as a building block in the fractional order PID controllers [21].…”

mentioning

confidence: 99%

“…In addition, research has been conducted recently for improving network communication performance, such as integrating code scheduling, memory allocation, and access optimization [18], optimizing data packet size in generic sensor networks [19,20], and nonlinear controllers [21,22]. For example, an efficient hardware implementation of the Grünwald-Letnikov fractional order Proportional Integral Derivative (PID) was proposed as a building block in the fractional order PID controllers [21]. A PLC-based fractional-order controller design was proposed for input delayed systems, and the non-integer-order controller was compared against integer-order PID controls on an industrial-oriented water tank volume control application [22].…”

mentioning

confidence: 99%

Dynamic Optimization of Data Packet-based Communication for PLC Visual Monitoring

Yang

Chen

et al. 2019

Applied Sciences

View full text Add to dashboard Cite

This paper presents a dynamic optimization solution for the data packet-based communication of programmable logic controller (PLC) visual monitoring, and the objective is to improve the communication efficiency between a supervisory computer and field PLCs in consideration of the network communication performance, such as network bandwidth, packet loss or retransmission rate, and human response delay. A nonlinear optimization model with constraints is formulated and solved analytically to obtain the minimized transmission time. Experimental results demonstrate that the proposed dynamic optimization can solve the practical industry problem in an efficient and effective manner, and it can provide useful guidance for the data packet-based communication setting of networked control systems.

show abstract

Fractional order integrator/differentiator: FPGA implementation and FOPID controller application

Cited by 46 publications

References 26 publications

Integer-and Fractional-Order Integral and Derivative Two-Port Summations: Practical Design Considerations

Integer-and Fractional-Order Integral and Derivative Two-Port Summations: Practical Design Considerations

Synchronization of Fractional-Order Complex Chaotic Systems Based on Observers

Dynamic Optimization of Data Packet-based Communication for PLC Visual Monitoring

Contact Info

Product

Resources

About