Fragile IP Watermarking Techniques

Abstract

Abstract-Intellectual property (IP) blocks reuse is essential for facilitating the design process of system-on-a-chip. Sharing IP designs still poses significant high security risks not only to copyright but also to design authenticity. Intruders, or even competitors, can make design changes to IPs, which can lead to the loss of the owner's credibility. In this paper, we are trying to solve such challenge by proposing a novel fragile IP watermarking technique. The proposed technique protects hardware designs from alteration or any modifications that might occur to the design. The approach utilizes existing transitions in a finite state machine (FSM) component of an IP and does not result on any overhead to the IP design. Finally, we implemented the algorithm proposed and tested it.

A case study in hardware Trojan design and implementation

“…State transition graphs (STG) that exhibit rare patterns are added to a design by [22,23,29]. Extending upon this idea, [2][3][4], search the existing FSM for useable transitions. Others such as [8,15] utilize the NP-complete design space of the algorithms driving the EDA to provide the flexibility for watermarking.…”

“…Pressing the encrypt button on the board sends the message through an AES-128 encryption block with the key selected by the 5 dip switches. 2 Finally, the transmit button sends the encrypted message over the serial port. The message receiver uses the correct key to decrypt the message.…”

Sequence-Aware Watermark Design for Soft IP Embedded Processors

“…The invasive detection techniques require an access to device internals, such as input and output (I/O) ports, memories and a full or partial knowledge of a system. The Finite State Machines (FSM) have been successfully used through an addition of extra states [21], [22], partial [23], [24] or complete [25] reuse of existing states, and allow a significant reduction of hardware implementation costs. To extract the embedded digital watermarks the output ports of a device are observed, while the dedicated activation vectors, integrated as a part of a test kernel [26], are applied to the input ports.…”

“…Upon detection of a unique input sequence or instruction, a watermark is copied to the specific memory location. In a typical invasive watermarking approach, such as FSM [21]- [25], the watermark is interwoven with the original IP and the removal of the watermarked logic compromises the design. To perform a post-fabrication detection, an IP provider requires an architectural knowledge, such as I/O ports or memory.…”