Framework and tools for run-time reconfigurable designs

Abstract

This paper describes a framework and tools for automating the production of designs that can be partially recon gured at run time. The approach involves several stages, including: (i) a partial evaluation stage, which produces con guration les for a given design, where the number of con gurations are minimised during the compile-time sequencing stage (ii) an incremental con guration calculation stage, which takes the output of the partial evaluator and generates an initial con guration le and incremental con guration les that partially update preceding con gurations (iii) an optimisation stage for devices or systems supporting simultaneous conguration of multiple components. While many of our techniques are independent of the design language and device used, experimental tools have been developed that target Xilinx 6200 devices. Simultaneous con guration, for example, can be used to reduce the time for recon guring an adder to a subtractor from time linear with respect to its size to constant time at best and logarithmic time at worst. Our tools have been used in developing a variety of designs, including arithmetic, video and database applications.

Customisable Hardware Compilation

“…We have identified a multitude of opportunities for customising the source, the compile scheme and the design transformations, for automating source-level transformations by compiler passes, and for facilitating the production of such compiler passes and other customisations based on a metalanguage. Current and future work includes incorporating domain-specific customisations [1,12] into our framework, verifying the correctness of customisations [14], extending our work to cover other compilation schemes such as ASC [15], and investigating support for run-time design reconfiguration [18].…”

Combining imperative and declarative hardware descriptions

“…Thirdly, there is scope for exploiting run-time reconfiguration [9]. Currently, we use pipelining based on loop bounds known at compile time only.…”

Incremental elaboration for run-time reconfigurable hardware designs

“…This process is similar to the technique of finding a partial configuration [14]; the distinction is that we are interested in the source statements that elaborate to these sets. This is because, if the source statements can be manipulated in such a way so that parameter changes only elaborate to the incremental sets, then it is possible to incrementally elaborate a design.…”