Semiconductor nanowires are promising candidates for future applications in electronics and photonics. Silicon nanowires are attracting much attention due to their technical compatibility with existing semiconductor technology. [1,2] Silicon nanowires have been successfully incorporated in field effect transistors, [3] chemical sensors, [4] and field emitters.[5]However, for device applications, one important challenge that needs to be overcome is obtaining precise control of the size, crystallographic orientation, location, and packing manner of the nanowires. Much research effort has been devoted to the fabrication and applications of silicon nanowires. Usually, silicon nanowires are grown with random orientations and further processing is required to assemble the nanowires for specific applications. [6][7][8][9] Recently, the orientationcontrolled growth of silicon nanowire arrays, [10,11] and the controlled growth of silicon nanowires in predetermined configurations [12] has been illustrated. Here, we show that large-area silicon nanowire arrays with controlled size, orientation, and packing density can be fabricated with a high throughput by a convenient method. While catalytic etching has been successfully developed as a method to fabricate silicon nanowires with uniform crystallographic orientation, this process still does not allow reliable control over the location and size of the nanowires. [13][14][15] By combining catalytic etching with the widely used nanosphere lithography method, [16,17] we have fabricated large-scale SiGe quantum dot arrays with a controlled diameter, height, and density.[18] Here, we show the large-scale fabrication of silicon nanowire arrays, which have many different applications, including as field emitters, [5] photonic crystals, [19] and vertical field effect transistors. [20] The diameter, height of individual nanowires, and the center-to-center distance between nanowires have been accurately controlled.The overall fabrication process is schematically depicted in Figure 1. First, the template, consisting of a monolayer of polystyrene (PS) spheres, is allowed to self-assemble on a Si substrate. Subsequently, a reactive ion etching (RIE) process is used to reduce the diameter of the PS spheres, which leads to the formation of colloidal particle arrays that are no longer close-packed. In the next step, a silver film is thermally evaporated onto the silicon substrate as a catalyst. Owing to the PS monolayer mask, a Ag film with a hexagonal array of holes is formed. The diameters of the holes match that of the diameter-reduced PS spheres. Subsequently, an etching step is conducted in a mixture of deionized water, HF, and H 2 O 2 . The Ag film catalyzes the etching of silicon beneath it. During the etching process, the "walls" of the honeycomb are gradually etched away and the remnant silicon forms a nanowire array. Finally, the PS spheres are removed by dissolution in CHCl 3 , and the Ag film is dissolved in boiling aqua regia. Figure 2 shows scanning electron microscopy (SEM) ...