Front-End Board with Cyclone V as a Test High-Resolution Platform for the Auger_Beyond_2015 Front End Electronics

Abstract

The surface detector (SD) array of the Pierre Auger Observatory needs an upgrade which allows space for more complex triggers with higher bandwidth and greater dynamic range. To this end this paper presents a front-end board (FEB) with the largest Cyclone V E FPGA 5CEFA9F31I7N. It supports eight channels sampled with max. 250 MSps@14-bit resolution. Considered sampling for the SD is 120 MSps; however, the FEB has been developed with external anti-aliasing filters to retain maximal flexibility. Six channels are targeted at the SD, two are reserved for other experiments like: Auger Engineering Radio Array and additional muon counters. The FEB is an intermediate design plugged into a unified board communicating with a micro-controller at 40 MHz; however, it provides 250 MSPs sampling with an 18-bit dynamic range, is equipped with a virtual NIOS processor and supports 256 MB of SDRAM as well as an implemented spectral trigger based on the discrete cosine transform for detection of very inclined "old" showers. The FEB can also support neural network development for detection of "young" showers, potentially generated by neutrinos. A single FEB was already tested in the Auger surface detector in Malargüe (Argentina) for 120 and 160 MSps. Preliminary tests showed perfect stability of data acquisition for sampling frequency three or four times greater. They allowed optimization of the design before deployment of seven or eight FEBs for several months of continuous tests in the engineering array.

Artificial Neural Network as a FPGA Trigger for a Detection of Very Inclined Air Showers

“…Obtained signal waveforms were thus used to teach the 12-8-1 neural network already implemented in the 5CEFA7F31I7 FPGA on the Cyclone V development kit. This FPGA is a smaller version of the chip being designed for the Front-End Board within the Auger upgrade R&D work [27]. Preliminary results show that the 16-point ANN algorithm can detect neutrino events currently unobserved by the standard Auger triggers and can support a recognition of neutrino-induced very inclined showers where signal waveforms are relatively short and the muonic bump is better separated from the electromagnetic component.…”

“…University of Łódź develops a new Front-End Board based on Altera Cyclone V 5CEFA9F31I7 and 8 channels supported by the ADS4249 (Texas Instr. 2-channel, 14-bits 250MSps ADCs) [27]. It can implement the developing ANN in the real environmental conditions in the Argentinean pampa.…”

Field Programmable Gate Array Applications—A Scientometric Review

“…These technique has been used for Positron Emission Tomography (PET) [563][564][565][566], Light Detection And Ranging (LIDAR) [567,568] and high speed ADC (Analog-to-digital converter) [569,570]. Discrete Cosine Transform (DCT) implementations in FPGAs have been applied to MPEG-based video encoders [571][572][573], JPEG encoders [574,575], for the Pierre Auger cosmic rays observatory front end detectors [576][577][578][579] and recently to image mosaicing systems [580]. Total Harmonic Distortion (THD) is a measure of the effective value of the harmonic components of a distorted waveform and it is commonly used for a quick measure of distortion [581].…”

Laboratory tests of two-dimensional wavelet trigger in radio detection of cosmic rays

“…It has been implemented into Altera R Cyclone R V E FPGA 5CEFA9F31I7, the heart of the new prototype FEB developed for the upgraded surface detector in AugerPrime [15] [19]. After the conversion from the LVDS ADC outputs to a single-ended internal standard of the FPGA fabric signals are put on the wavelet engine.…”

“…Burst pulses from Tektronix AFG3252C arbitrary pattern generator have driven the radio channel in the prototype Front End Board (FEB) developed for the upgraded surface detector in the Pierre Auger Observatory [15] [19]. The FEB is equipped with the biggest FPGA 5CEFA9F31I7 from the Cyclone R V E family.…”