FTL design exploration in reconfigurable high-performance SSD for server applications

Shin, Ji-Yong; Xia, Zenglin; Xu, Ning; Gao, Rui; X, Cai; Maeng, Seungryoul; Hsu, Feng-Hsiung

doi:10.1145/1542275.1542324

Cited by 87 publications

(32 citation statements)

References 18 publications

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“…MSR SSD simulator is event-driven and based on the Disksim 4.0 [2] simulator. MSR SSD simulator has been used in several SSD related researches [31], [36]. In this paper, we simulated a NAND flash based SSD.…”

Section: A Experimental Setupmentioning

confidence: 99%

A semi-preemptive garbage collector for solid state drives

Lee

Kim

Shipman

et al. 2011

(Ieee Ispass) Ieee International Symposium on Performance Analysis of Systems and Software

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Abstract-NAND flash memory is a preferred storage media for various platforms ranging from embedded systems to enterprise-scale systems. Flash devices do not have any mechanical moving parts and provide low-latency access. They also require less power compared to rotating media. Unlike hard disks, flash devices use out-of-update operations and they require a garbage collection (GC) process to reclaim invalid pages to create free blocks. This GC process is a major cause of performance degradation when running concurrently with other I/O operations as internal bandwidth is consumed to reclaim these invalid pages. The invocation of the GC process is generally governed by a low watermark on free blocks and other internal device metrics that different workloads meet at different intervals. This results in I/O performance that is highly dependent on workload characteristics. In this paper, we examine the GC process and propose a semi-preemptive GC scheme that can preempt on-going GC processing and service pending I/O requests in the queue. Moreover, we further enhance flash performance by pipelining internal GC operations and merge them with pending I/O requests whenever possible. Our experimental evaluation of this semi-preemptive GC sheme with realistic workloads demonstrate both improved performance and reduced performance variability. Write-dominant workloads show up to a 66.56% improvement in average response time with a 83.30% reduced variance in response time compared to the non-preemptive GC scheme.

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Section: A Experimental Setupmentioning

confidence: 99%

A semi-preemptive garbage collector for solid state drives

Lee

Kim

Shipman

et al. 2011

(Ieee Ispass) Ieee International Symposium on Performance Analysis of Systems and Software

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“…We have used the Microsoft Research SSD simulator [4], which is based on DiskSim [8] and has been used in several other studies [25], [26], [44]. We have simulated a NAND flash SSD, with the parameters described in Table IV.…”

Section: B Simulator Implementation and Setupmentioning

confidence: 99%

“…disk head control, there is no risk of failure if an operation completes too late or too early. Unlike HDDs, with a single I/O channel to the media, internal I/O bandwidth inside SSDs continues to increase as channel counts increase and new interface standards are developed [4], [23], [44]. High-performance control processors are used in order to handle bursty I/O interrupts and reduce I/O latency [23], but these latency-sensitive operations account for only a small amount of total time, especially if handled quickly, leaving resources available to run other tasks such as post-processing, data conversion and analysis.…”

Section: Related Workmentioning

confidence: 99%

Active Flash: Out-of-core data analytics on flash storage

Boboila

Kim

Vazhkudai

et al. 2012

012 IEEE 28th Symposium on Mass Storage Systems and Technologies (MSST)

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Abstract-Next generation science will increasingly come to rely on the ability to perform efficient, on-the-fly analytics of data generated by high-performance computing (HPC) simulations, modeling complex physical phenomena. Scientific computing workflows are stymied by the traditional chaining of simulation and data analysis, creating multiple rounds of redundant reads and writes to the storage system, which grows in cost with the ever-increasing gap between compute and storage speeds in HPC clusters. Recent HPC acquisitions have introduced compute nodelocal flash storage as a means to alleviate this I/O bottleneck.We propose a novel approach, Active Flash, to expedite data analysis pipelines by migrating to the location of the data, the flash device itself. We argue that Active Flash has the potential to enable true out-of-core data analytics by freeing up both the compute core and the associated main memory. By performing analysis locally, dependence on limited bandwidth to a central storage system is reduced, while allowing this analysis to proceed in parallel with the main application. In addition, offloading work from the host to the more power-efficient controller reduces peak system power usage, which is already in the megawatt range and poses a major barrier to HPC system scalability.We propose an architecture for Active Flash, explore energy and performance trade-offs in moving computation from host to storage, demonstrate the ability of appropriate embedded controllers to perform data analysis and reduction tasks at speeds sufficient for this application, and present a simulation study of Active Flash scheduling policies. These results show the viability of the Active Flash model, and its capability to potentially have a transformative impact on scientific data analysis.

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“…performance, of NFSDs by improving the architecture of NFSD [1] or exploiting parallelism of multiple NFM chips [7]. In [3][4][5], several system-level solutions and reconfigurable FTL design such as concurrency are considered in optimizing the design objectives of NFSD. All these works, however, did not pay attention to the impact of design parameters of NFM such as page or block size or characteristics of applications.…”

Section: Introductionmentioning

confidence: 99%

Application-aware Design Parameter Exploration of NAND Flash Memory

Bang¹,

Kim²,

Park³

et al. 2013

JSTS:Journal of Semiconductor Technology and Science

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Abstract-NAND flash memory (NFM) based storage devices, e.g. Solid State Drive (SSD), are rapidly replacing conventional storage devices, e.g. Hard Disk Drive (HDD). As NAND flash memory technology advances, its specification has evolved to support denser cells and larger pages and blocks. However, efforts to fully understand their impacts on design objectives such as performance, power, and cost for various applications are often neglected. Our research shows this recent trend can adversely affect the design objectives depending on the characteristics of applications. Past works mostly focused on improving the specific design objectives of NFM based systems via various architectural solutions when the specification of NFM is given. Several other works attempted to model and characterize NFM but did not access the system-level impacts of individual parameters. To the best of our knowledge, this paper is the first work that considers the specification of NFM as the design parameters of NAND flash storage devices (NFSDs) and analyzes the characteristics of various synthesized and real traces and their interaction with design parameters. Our research shows that optimizing design parameters depends heavily on the characteristics of applications. The main contribution of this research is to understand the effects of low-level specifications of NFM, e.g. cell type, page size, and block size, on system-level metrics such as performance, cost, and power consumption in various applications with different characteristics, e.g. request length, update ratios, read-and-modify ratios. Experimental results show that the optimized page and block size can achieve up to 15 times better performance than the conventional NFM configuration in various applications. The results can be used to optimize the system-level objectives of a system with specific applications, e.g. embedded systems with NFM chips, or predict the future direction of NFM.

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FTL design exploration in reconfigurable high-performance SSD for server applications

Cited by 87 publications

References 18 publications

A semi-preemptive garbage collector for solid state drives

A semi-preemptive garbage collector for solid state drives

Active Flash: Out-of-core data analytics on flash storage

Application-aware Design Parameter Exploration of NAND Flash Memory

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