Full-Gate Verification of Superconducting Integrated Circuit Layouts With InductEx

Fourie, Coenrad J.

doi:10.1109/tasc.2014.2360870

Cited by 53 publications

(19 citation statements)

References 16 publications

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“…10. First, each building-block cell is carefully designed using the three-dimensional parameter extractor, InductEx [71,72]. Then, the AND cell is designed by putting together two buffer cells, a constant-0 cell, and a branch cell, where the constant-0 cell generates a 0 signal and the branch cell merges the output currents from the buffer and constant cells.…”

Section: Logic Gate Designmentioning

confidence: 99%

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Takeuchi

Yamae

Ayala

et al. 2022

IEICE Trans. Electron.

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The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic element based on the quantum flux parametron. AQFP circuits can operate with energy dissipation near the thermodynamic and quantum limits by maximizing the energy efficiency of adiabatic switching. We have established the design methodology for AQFP logic and developed various energy-efficient systems using AQFP logic, such as a low-power microprocessor, reversible computer, single-photon image sensor, and stochastic electronics. We have thus demonstrated the feasibility of the wide application of AQFP logic in future information and communications technology. In this paper, we present a tutorial review on AQFP logic to provide insights into AQFP circuit technology as an introduction to this research field. We describe the historical background, operating principle, design methodology, and recent progress of AQFP logic.

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Section: Logic Gate Designmentioning

confidence: 99%

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Takeuchi

Yamae

Ayala

et al. 2022

IEICE Trans. Electron.

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“…We used the control (CTL) layer [3], which is the top wiring layer in the AIST 2.5 kA/cm 2 Nb standard process 2 (AIST-STP2), as the over-ground plane. A three-dimensional inductance extraction tool, InductEx [15], [16], was used to extract the inductances from the circuit layout. Figure 2(a) shows the mask layout of the dynamically reconfigurable SFQ AND/OR gate that is compatible with the CONNECT cell library [17].…”

Section: Copyright Cmentioning

confidence: 99%

30GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates

Yamanashi

Nishimoto

Yoshikawa

2016

IEICE Trans. Electron.

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A single-flux-quantum (SFQ) arithmetic logic unit (ALU) was designed and tested to evaluate the effectiveness of introducing dynamically reconfigurable logic gates in the design of a superconducting logic circuit. We designed and tested a bit-serial SFQ ALU that can perform six arithmetic/logic functions by using a dynamically reconfigurable AND/OR gate. To ensure stable operation of the ALU, we improved the operating margin of the SFQ AND/OR gate by employing a partially shielded structure where the circuit is partially surrounded by under-and over-ground layers to reduce parasitic inductances. Owing to the introduction of the partially shielded structure, the operating margin of the dynamically reconfigurable AND/OR gate can be improved without increasing the circuit area. This ALU can be designed with a smaller circuit area compared with the conventional ALU by using the dynamically reconfigurable AND/OR gate. We implemented the SFQ ALU using the AIST 2.5 kA/cm 2 Nb standard process 2. We confirmed high-speed operation and correct reconfiguration of the SFQ ALU by a high-speed test. The measured maximum operation frequency was 30 GHz. key words: SFQ circuit, shielding, arithmetic logic unit, reconfigurable logic device

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“…In this paper, we precisely design the impedance of excitation lines using InductEx [20], which is a three-dimensional inductance extractor for superconductor devices. Recently, characteristic impedance calculation capability was added to InductEx [21], which simultaneously uses magnetoquasistatic inductance calculation with the inclusion kinetic inductance and electroquasistatic capacitance calculation with the inclusion of multiple dielectric layers.…”

Section: Introductionmentioning

confidence: 99%

Impedance Design of Excitation Lines in Adiabatic Quantum-Flux-Parametron Logic Using InductEx

Takeuchi

Suzuki

Fourie

et al. 2021

IEEE Trans. Appl. Supercond.

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The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic family that utilizes adiabatic switching. AQFP gates are powered and clocked by ac excitation current; thus, to operate AQFP circuits at high clock frequencies, it is required to carefully design the characteristic impedance of excitation lines (especially, above AQFP gates) so that microwave excitation current can propagate without reflections in the entire circuit. In the present study, we design the characteristic impedance of the excitation line using InductEx, which is a three-dimensional parameter extractor for superconductor devices. We adjust the width of an excitation line using InductEx such that the characteristic impedance becomes 50 W even above an AQFP gate. Then, we fabricate test circuits to verify the impedance of the excitation line. We measure the impedance using the time domain reflectometry (TDR). We also measure the S parameters of the excitation line to investigate the maximum available clock frequency. Our experimental results indicate that the characteristic impedance of the excitation line agrees well with the design value even above AQFP gates, and that clock frequencies beyond 5 GHz are available in large-scale AQFP circuits.

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Full-Gate Verification of Superconducting Integrated Circuit Layouts With InductEx

Cited by 53 publications

References 16 publications

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

30GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates

Impedance Design of Excitation Lines in Adiabatic Quantum-Flux-Parametron Logic Using InductEx

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