Eurocon 2013 2013
DOI: 10.1109/eurocon.2013.6625168
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Fully integrated power management unit (PMU) using NMOS Low Dropout regulators

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Cited by 7 publications
(3 citation statements)
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“…Since the output node is having a low resistance, it is not convenient to make it as a dominant pole. This forces the pole at the input of pass transistor to be a dominant one [23]- [25]. Resistor R3 and capacitor Cc are used for this purpose.…”
Section: Design Of Nmos Based Regulatormentioning
confidence: 99%
“…Since the output node is having a low resistance, it is not convenient to make it as a dominant pole. This forces the pole at the input of pass transistor to be a dominant one [23]- [25]. Resistor R3 and capacitor Cc are used for this purpose.…”
Section: Design Of Nmos Based Regulatormentioning
confidence: 99%
“…Many studies have contributed to enhancing PSR [4,5,6,7,8,9,10,11,12]. Some techniques can effectively improve the PSR of LDO, such as using simple RC filtering at the output of LDO [13,14], cascading two LDOs [15,16], using NMOS transistors as power transistor and gate voltage is controlled using charge pump technology [17,18,19]. The main idea of these techniques is to increase the PSR of the LDO by adding more isolation before input and output along the current path of the power transistor.…”
Section: Introductionmentioning
confidence: 99%
“…In this Chapter, a step-down switched-capacitor DC-DC converter with no-load voltage conversion ratio of M VCR,NL = 2/3 is proposed. An NMOS-LDO [110] is integrated with the SC converter in both charging and discharging phases to…”
Section: Introductionmentioning
confidence: 99%