2007 IEEE International Test Conference 2007
DOI: 10.1109/test.2007.4437575
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Fully X-tolerant combinational scan compression

Abstract: Traditional scan and, more recently, scan compression are increasingly accepted for reducing test cost and improving quality in ever more complex designs. Combinational scan compression techniques are attractive for their low impact on area, timing and design flow, but are best suited for designs with a limited number of unknowns (Xs). However, recent design performance and cost tradeoffs create a much higher density of Xs than previously expected. We present a combinational scan compression method that preser… Show more

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Cited by 48 publications
(15 citation statements)
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References 16 publications
(27 reference statements)
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“…The output side has a layer of masking logic dedicated to handling don't care bits (Xs) in the response, an XOR based compactor and a shift register that has additional XORs to accumulate the response as it streams out. The technology can scale from as low as one scan input/output to as many scan ports as available on the design It must be noted that a low pin count solution can be developed by designing serial-to-parallel structures around [15] by adding registers at the scan interface. However, this leads to a degradation in compression QoR as additional shift cycles are added per scan shift operation.…”
Section: Zscan Compressed Dft Insertionmentioning
confidence: 99%
See 1 more Smart Citation
“…The output side has a layer of masking logic dedicated to handling don't care bits (Xs) in the response, an XOR based compactor and a shift register that has additional XORs to accumulate the response as it streams out. The technology can scale from as low as one scan input/output to as many scan ports as available on the design It must be noted that a low pin count solution can be developed by designing serial-to-parallel structures around [15] by adding registers at the scan interface. However, this leads to a degradation in compression QoR as additional shift cycles are added per scan shift operation.…”
Section: Zscan Compressed Dft Insertionmentioning
confidence: 99%
“…For designs with ample number of scan ports, hierarchical approaches have been presented in [15] using adaptive scan compression. Here the design is partitioned in to modules based on either blocks where DFT is to be inserted or blocks which are DFT ready and have abstracted test models that can be used for DFT closure rather than their full netlist representation.…”
mentioning
confidence: 99%
“…Others achieve X-tolerance by decoupling certain scan channels from each other in the response compactor [10]. In some cases a combination of X-tolerance with X-masking schemes can be found [11,12].…”
Section: B Response Compaction In Presence Of Xsmentioning
confidence: 99%
“…The analysis was focused on the observability since this property had the highest impact on the number of test patterns and the test quality in the presence of a large number of Xs. More formally, the AMC(n,k,t) constructed based on Corollary 2 (using a simple output mapping) was compared with the fully X-tolerant compactor [19]. Accordingly, both compactors had the same number of inputs and outputs, and used control per shift.…”
Section: Simulation Experimentsmentioning
confidence: 99%
“…Significant improvement in the X-tolerant capabilities of the compactors was achieved based on masking and selection using control per test, control per shift or combined control [13][14][15][16][17][18][19]. Most of the presented schemes are compatible with certain types of decompressors and compressors.…”
Section: Introductionmentioning
confidence: 99%