2013
DOI: 10.2298/csis120416019b
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Functional delay test generation approach using a software prototype of the circuit

Abstract: The paper presents functional delay test generation approach for non-scan synchronous sequential circuits. The non-scan sequential circuit is represented as the iterative logic array model consisting of k copies of the combinational logic of the circuit. The value k defines the number of clock cycles. The software prototype model is used for the representation of the function of the circuit. The faults are considered on the inputs and on the outputs of the model only. The random input stimuli are generated and… Show more

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Cited by 2 publications
(9 citation statements)
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“…Setting the conditions for completing the generation, selection of the correct length of test patterns, setting the best distribution of ones and zeroes for random generation can be carried out on the same principles as during functional test generation. These principles are described in the article [15].…”
Section: The Addition Of Non-scan Test Based On the Results Of Fault mentioning
confidence: 99%
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“…Setting the conditions for completing the generation, selection of the correct length of test patterns, setting the best distribution of ones and zeroes for random generation can be carried out on the same principles as during functional test generation. These principles are described in the article [15].…”
Section: The Addition Of Non-scan Test Based On the Results Of Fault mentioning
confidence: 99%
“…Only relatively short sequences manage to calculate within a reasonable period of time when using deterministic methods. Therefore, functional test generation techniques are useful, which uses the principle of the selection [15]. Test patterns are generated randomly or according to the given rules.…”
Section: Related Workmentioning
confidence: 99%
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