Fundamentals of Heat Dissipation in 3D IC Packaging and Thermal-Aware Design

Kandlikar, Satish G.; Ganguly, Amlan

doi:10.1007/978-981-15-7090-2_13

Cited by 2 publications

(2 citation statements)

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“…As a result, 3D IC packaging stands as an innovative approach to semiconductor packaging, offering superior performance, energy efficiency, and spatial utilization. This technology involves the vertical stacking of multiple semiconductor dies, interconnected through Through-Silicon Vias (TSVs), culminating in a single compact package [4]. Nevertheless, the manufacturing of 3D ICs poses formidable challenges.…”

Section: Introductionmentioning

confidence: 99%

“…Nevertheless, the manufacturing of 3D ICs poses formidable challenges. Concerns encompass issues such as heat dissipation within confined regions due to the misalignment of TSVs during chip stacking [4]. These thermal issues necessitate effective heat dissipation strategies, demanding efficient thermal interfaces to ensure optimal performance.…”

Section: Introductionmentioning

confidence: 99%

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Formation of Cu Nanotwins on Silicon Carbide Wafers with Cr Adhesive Layer under Various Substrate Bias

Syafei,

Chiang,

Chuang

2023

Metals

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This study focuses on the analyses of nano-twinned copper (Cu) films deposited through magnetron sputtering on silicon carbide (SiC) chips. The investigation encompasses the utilization of a chromium (Cr) adhesive layer coupled with varying voltage bias conditions. The goal is to comprehensively examine the influence of the adhesive layer and negative bias voltages, contributing to an enhanced understanding of materials engineering and bonding technologies for advanced applications. The formation of a nano-twinned structure and (111) surface orientation can be properly controlled by applied substrate bias. High-density nanotwinned structures were introduced into Cu films sputtered on SiC substrates with 82.3% of (111) orientation proportion at −150 V, much higher than the Cu film sputtered with another substrate bias. It is concluded that the sputtered Cu nanotwinned film formed with −150 V bias voltage has the potential to be employed as the interlayer for low-temperature direct bonding.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%