Further Possibilities of FG Device Compact Models

Abstract

Reliability prediction and statisticsThe main purpose of this and the next Chapters is to show the new possibilities and application fields of the CM of FG memory devices from a designer's point of view.As we will show, CMs of FG memories allow not only to reproduce the electrical behavior of FG memory cells in read, program and erase conditions, but also to perform some predictions about reliability (data retention, program and read disturbs) of FG memory devices. Furthermore, accurate models of FG devices permit to gain deep insights into the effects of device parameter statistics, which is strictly related to the whole manufacturing flow, on the electrical performances of FG memories. Moreover the models constitute a powerful tool to optimize program and erase algorithms, and generally to speed-up and simplify the design of the circuitry needed to manage read, program and erase FG memory operations.Note that the above possibilities and applications illustrate new uses of FG memory CMs that can help both process engineers and circuit designers to develop NV memory product featuring the best tradeoff between reliability and performance.The chapter is organized as follows. In Paragraph 5.1, it will be described how the charge balance model can be extended to simulate FG memory reliability. Particularly, as done in Chapter 4, one or more voltage controlled current sources modeling the leakage current induced by the aging of the gate oxide will be added to the framework of the model to simulate data retention and program/read disturbs of FG memory devices.In Paragraph 5.2, it will be shown how FG memory CMs can help designers to make the design phase robust against statistical variations of device parameters. In fact, good CMs must take into account and model correctly the statistical variations of devices' dimensions and performances, thus aiding the designer to cope more effectively with the process induced variability of electrical devices.