GaAs area‐selective regrowth with molecular layer epitaxy for integration of low noise and power transistors, and Schottky diodes

Abstract

We have developed a GaAs mm‐wave power static induction transistor (SIT) with a regrown source‐drain offset. It was fabricated with low‐temperature, area‐selective molecular layer epitaxial regrowth in a process compatible with that of a low‐noise high‐frequency ideal static induction transistor. The fmax of the power SIT was 111 GHz at gm of 220 mS/mm. These values can be improved with gate engineering. Our method can be used for fabrication of mm‐wave system‐on‐chip wafers including also Schottky barrier diodes. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Sidewall GaAs tunnel junctions fabricated using molecular layer epitaxy

“…Structures such as a spin-injection light-emitting diode [25] and a tunnel-injection transit time effect diode (TUNNETT) [26][27][28][29] have also been reported. Tunnel junctions have been used in transistor structures, such as tunnel transistors [30], tunnel-source field-effect transistors (FETs) [31], δ-doped tunnel FETs [32], heterojunction bipolar transistors (HBTs) with a degenerately doped emitter [33], and ideal static-induction transistors (ideal SITs) [34][35][36].…”