Gain and offset correction methods for analog-to-digital converters

Abstract

This paper describes a simple offset error (OEC) and two gain error (GEC) correction methods for an analog-digital converter (ADC), which use a dedicated sample-and-hold (S/H) circuit. These three methods are specifically proposed for switched-capacitor (SC) S/H circuits. In these methods, few unit capacitors of main S/Hcapacitor are separated for correction. OEC method and one of GEC method uses bottom-plate sampling to correct the sampled voltage. The second GEC method uses charge sharing method between capacitors.