GaN-based low-power JLDG-MOSFETs: Effects of doping and gate work function

Abstract

This study aims to explore the potential of the GaN-based junction-less double-gate (JLDG) MOSFETs in resolving the limitations by tuning its doping profile, ND, and gate work function, Ф to realize low-power switching applications. Device figure-of-merits (FOMs) such as ION, ION/IOFF, subthreshold slope (SS), and drain-induced barrier lowering (DIBL) have been evaluated. The highest ION is 0.9 mA/µm, which resulted in ND = 1×1019 cm-3. The device behaviour is also impacted significantly by changing gate work function, Ф. The OFF-state current, IOFF of 1.24×10-16 A/µm and power dissipation of 9.69×10-17 W/µm have been found for Ф = 5.11 eV (Au). In addition, the highest ION/IOFF of 7.56×1012 indicates the GaN-based JLDG MOSFETs promising for next-generation low-power logic switching applications.