Gate-tunable, normally-on to normally-off memristance transition in patterned LaAlO3/SrTiO3 interfaces

Abstract

We report gate-tunable memristive switching in patterned LaAlO3/SrTiO3 interfaces at cryogenic temperatures. The application of voltages in the order of a few volts to the back gate of the device allows controlling and switching on and -off the inherent memory functionality (memristance). For large and small gate voltages a simple non-linear resistance characteristic is observed while a pinched hysteresis loop and memristive switching occurs in an intermediate voltage range. The memristance is further controlled by the density of oxygen vacancies, which is tuned by annealing the sample at 300 °C in nitrogen atmosphere. Depending on the annealing time the memristance at zero gate voltage can be switched on and off leading to normally-on and normally-off memristors. The presented device offers reversible and irreversible control of memristive characteristics by gate voltages and annealing, respectively, which may allow to compensate fabrication variabilities of memristors that complicate the realization of large memristor-based neural networks. a) Corresponding

Controlling Memristance and Negative Differential Resistance in Point‐Contacted Metal–Oxides–Metal Heterojunctions: Role of Oxygen Vacancy Electromigration and Electron Hopping

“…[20] For most of the oxides, especially perovskite oxides like strontium titanite, resistive switching is usually related to OVs. [21][22][23][24] However, it is complex to distinguish whether the immigration of OVs, trapping and detrapping of carriers, or carrier hopping between OVs play a key role in resistive switching. It is desirable to study the conduction mechanism of the oxides memristors by controlling parameters like the concentration of OVs and carriers.…”

Controlling the electronic interface properties of AlO$_x$/SrTiO$_3$ heterostructures

“…[3][4][5][6]. These materials and the LAO/STO 2DES in particular are a fascinating wellspring for novel functionalities, for example in memresistive devices [7]. However, heterostructuring with epitaxial LAO layers is not the only way to create a 2DES in STO.…”