Generalized SAT-Attack-Resistant Logic Locking

Abstract

Logic locking is used to protect integrated circuits (ICs) from piracy and counterfeiting. An encrypted IC implements correct function only when the right key is input. Many existing logic locking methods are subject to the powerful satisfiability (SAT)-based attack. Recently, an Anti-SAT scheme has been developed. By adopting two complementary logic blocks that consist of AND/NAND trees, it makes the number of iterations needed by the SAT attack exponential to the number of input bits. Nevertheless, the Anti-SAT scheme is vulnerable to the later AppSAT and removal attacks. This paper proposes a generalized (G-)Anti-SAT scheme. Different from the Anti-SAT scheme, a variety of complementary or non-complementary functions can be adopted for the two blocks in our G-Anti-SAT scheme. Pairs of functions that consist of similar number of minterms can be chosen to resist the AppSAT and removal attacks. Meanwhile, our design requires the same number of iterations in the SAT attack as the Anti-SAT scheme, and hence is always resistant to the SAT attack. The Anti-SAT scheme is just a special case of our proposed design.