Generating hardware from OpenMP programs

Leow, Yao-Guang; Ng, CH; Wong, Weng-Fai

doi:10.1109/fpt.2006.270297

Cited by 35 publications

(20 citation statements)

References 9 publications

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“…Our compiler also supports setting different constraints on the generated code (increasing design-space exploration). From a compilation perspective, our work is closely related and inspired by Leow et al's OpenMP compiler [7]-we use similar technique of mapping the C code to a state-machine.…”

Section: Related Workmentioning

confidence: 99%

Accelerating Parallel Computations with OpenMP-Driven System-on-Chip Generation for FPGAs

Podobas

2014

2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs

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Abstract-The task-based programming paradigm offers a portable way of writing parallel applications. However, it requires tedious tuning of the application for performance. We present a novel design flow where programmers can use application knowledge to easily generate a System-on-Chip (SoC) specialized in executing the application. Our design flow uses a compiler that automatically generates task-specific cores and packs them into a custom SoC. A SoC-specific runtime systems schedules tasks on cores to accelerate application execution. The generated SoC shows up to 6000 times performance improvement in comparison to the Altera NiosII/s processor and up to 7 times compared to an AMD Opteron 6172 core. Our design flow helps programmers generate high-performance systems without requiring tuning and prior hardware design knowledge.

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Section: Related Workmentioning

confidence: 99%

Accelerating Parallel Computations with OpenMP-Driven System-on-Chip Generation for FPGAs

Podobas

2014

2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs

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“…There are fewer limitations concerning control-flow but comes at the cost of performance. Examples of state-machine based parallel HLS-tools include the work by Leow et al [13] and Nowak et al [16] (albeit microcoded).…”

Section: Related Workmentioning

confidence: 99%

Empowering OpenMP with automatically generated hardware

Podobas

Brorsson

2016

2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)

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Abstract-OpenMP enables productive software development that targets shared-memory general purpose systems. However, OpenMP compilers today have little support for future heterogeneous systems -systems that will more than likely contain Field Programmable Gate Arrays (FPGAs) to compensate for the lack of parallelism available in general purpose systems.We have designed a high-level synthesis flow that automatically generates parallel hardware from unmodified OpenMP programs. The generated hardware is composed of accelerators tailored to act as hardware instances of the OpenMP task primitive. We drive decision making of complex details within accelerators through a constraint-programming model, minimizing the expected input from the (often) hardware-oblivious software developer.We evaluate our system and compare them to two state of the art architectures -the Xeon PHI and the AMD Opteron -where we find our accelerators to perform on par with the two ASIC processors.

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“…Threads have been extensively used in developing both application and system software. The most widely used API for shared memory parallel processing is OpenMP, a set of directives, runtime library routines and environmental variables that is supported on a wide range of multicore systems, shared memory processors, clusters and compilers (Leow et al, 2006). The approach of OpenMP is to start with a normal sequential programming language but create the parallel specifications by the judicious use of embedded compiler directives.…”

Section: Multi-core Systemmentioning

confidence: 99%