Optical Fiber Communication Conference 2018
DOI: 10.1364/ofc.2018.m3i.4
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Genetic algorithm and polynomial chaos modelling for performance optimization of photonic circuits under manufacturing variability

Abstract: We propose an efficient technique based on polynomial chaos expansion and genetic algorithms to enable constrained optimization of photonic integrated circuits subject to fabrication tolerances. Simulations on a realistic SOI design confirm its effectiveness.

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Cited by 7 publications
(7 citation statements)
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“…One of the areas where a lot of work is ongoing is variability analysis and yield prediction for photonic integrated circuits [77], [78], [80]- [83]. We discuss this in more detail in the next section.…”
Section: Future Photonic Circuit Design Flowmentioning
confidence: 99%
“…One of the areas where a lot of work is ongoing is variability analysis and yield prediction for photonic integrated circuits [77], [78], [80]- [83]. We discuss this in more detail in the next section.…”
Section: Future Photonic Circuit Design Flowmentioning
confidence: 99%
“…mean, variance, probability density function…) impractical. This problem can be particularly emphasized when the computation of the moments is required as part of an optimization routine because thousands of simulations would be required at each step of the optimization that could require itself several thousands of iterations [14].…”
Section: Surrogate Models With Polynomial Chaos Expansionmentioning
confidence: 99%
“…Accurate and efficient variability representation has been demonstrated for several photonic devices, also in the case of correlated random variables [11,12]. Models based on generalized polynomial chaos expansion have been recently exploited for circuit design optimization under fabrication uncertainty [13,14]. These techniques can provide a viable way to introduce uncertainty information at into machine-assisted design flows.…”
Section: Introductionmentioning
confidence: 99%
“…On the other hand, fully evaluating the statistical behavior of a device requires a large number of computations, with Monte Carlo simulation as the standard 'brute-force' method. Stochastic techniques such as polynomial chaos expansion have emerged as efficient alternatives to assess the performance robustness and expected fabrication yield [19,21,22]. Even with these advances, carrying out robustness assessment during the device optimization process requires prohibitive computation resources as well as being wasteful, since most evaluations would be carried out on structures that do not meet the primary objective.…”
Section: Global Mapping Of the Design Spacementioning
confidence: 99%