Genetic algorithm based logic optimization for multi- output majority gate-based nano-electronic circuits

Houshmand, Monireh; Khayat, Saied Hosseini; Rezaei, Razie

doi:10.1109/icicisys.2009.5357775

Cited by 15 publications

(5 citation statements)

References 10 publications

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“…The internal nodes can be the majority (M) and inverter (I) gates, while the external nodes (leaves) are variables or the logic '1'. This chromosome has been altered later [21,22], to implement a two-output circuit. In most cases, the aim is to reduce the number of majority gates.…”

Section: Genetic Algorithm Methodsmentioning

confidence: 99%

Optimization of Quantum Cellular Automata Circuits by Genetic Algorithm

Parvane

Rahimi

Jafarinejad

2020

IJE

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Quantum cellular automata (QCA) enables performing arithmetic and logic operations at the molecular scale. This nanotechnology promises high device density, low power consumption and high computational power. Unlike the CMOS technology where the ON and OFF states of the transistors represent binary information, in QCA, data is represented by the charge configuration. The primary and basic device in this paradigm is the three-input majority gate, thus in QCA, the conventional AND-OR mapping for implementation of logic functions is not effective. We introduce four primitive admissible geometric patterns, which aid in the identification of majority functions. For a nonmajority function, a genetic algorithm (GA) is used to map the function to at most four majority gates in a wide range of implementations. We show that the emergence of specific genes will result in a further reduction in the number of majority gates in the network. The GA is intrinsically parallel and results in variety of implementations, which allows merging the layout and logic levels of the design and provides an important approach towards designing high-performance QCA circuits.

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Section: Genetic Algorithm Methodsmentioning

confidence: 99%

Optimization of Quantum Cellular Automata Circuits by Genetic Algorithm

Parvane

Rahimi

Jafarinejad

2020

IJE

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“…In both of (10) and (11), by selecting literal 'a'' for factoring out, we have just one wire crossing as the following expressions, respectively…”

Section: Use Simple Gate or Universal Logic Gatementioning

confidence: 99%

“…Nonetheless, this individual specification could reduce the circuit's reliability. In many studies, delay, area and reduction of gate elements are discussed [6][7][8][9][10][11], yet the reliability is one of the most significant parameters which must be investigated in every technology.…”

Section: Introductionmentioning

confidence: 99%

Improving logic function synthesis, through wire crossing reduction in quantum‐dot cellular automata layout

Taherifard

2015

IET Circuits, Devices & Systems

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Quantum-dot cellular automata, as the successor of metal-oxide semiconductor field-effect transistors, are one of the promising nanotechnology devices, which have attracted myriad researchers in the recent decade. In this technology, coplanar wire crossing is one of the unique specifications that can reduce its reliability. In the present study, a heuristic method is introduced using the Karnaugh-Map (K-Map) to minimise the number of wire crossing as the first step. Afterwards, it attempts to replace each wire crossing with three non-wire crossing XOR gates that reduce all wire crossings to zero as the second step. Experimental results reveal that, reducing wire crossings to zero, the authors method for 3-variable functions lowers the number of gates about 54, 42, 58 and 59%, respectively, in comparison with K-Map, Genetic, Gate-Optimise and Universal Quantum-dot Cellular Automata Logic Gate (UQCALG) methods. For 4-variable functions, their method decreases the number of gates almost 64 and 58%, respectively.

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“…First, a given Boolean function is simplified to a function presented in the mentioned table, and then as a result, a majority expression equivalent to this table is chosen. Some methods [21][22][23][24] have applied meta-heuristic algorithms such as Genetic Algorithm (GA) and Genetic Programming (GP) for simplification of logic functions. Bonyadi et al [21] used GA for optimization of a given single-output Boolean function by majority and inverter gates while Houshmand et al in [22,23] applied GP algorithm for optimization of multi-outputs functions.…”

Section: Introductionmentioning

confidence: 99%

“…Some methods [21][22][23][24] have applied meta-heuristic algorithms such as Genetic Algorithm (GA) and Genetic Programming (GP) for simplification of logic functions. Bonyadi et al [21] used GA for optimization of a given single-output Boolean function by majority and inverter gates while Houshmand et al in [22,23] applied GP algorithm for optimization of multi-outputs functions. In [24], the work proposed in [21] has been extended, and a multi-objective optimization consisting of delay as well as the number of gates have been considered.…”

Section: Introductionmentioning

confidence: 99%

A multi-objective synthesis methodology for majority/minority logic networks

2016

Self Cite

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New technologies such as Quantum-dot Cellular Automata (QCA), Single Electron Tunneling (SET), Tunneling Phase Logic (TPL) and all-spin logic (ASL) devices have been widely advocated in nanotechnology as a response to the physical limits associated with complementary metal oxide semiconductor (CMOS) technology in atomic scales. Some of their peculiar features are their smaller size, higher speed, higher switching frequency, lower power consumption, and higher scale integration. In these technologies, the majority (or minority) and inverter gates are employed for the production of the functions as this set of gates makes a universal set of Boolean primitives in these technologies. An important step in the generation of Boolean functions using the majority gate is reducing the number of involved gates. In this paper, a multi-objective synthesis methodology (with the objective priority of gate counts, gate levels and the number of inverter gates) is presented for finding the minimal number of possible majority gates in the synthesis of Boolean functions using the proposed Majority Specification Matrix (MSM) concept. Moreover, based on MSM, a synthesis flow is proposed for the synthesis of multi-output Boolean functions. To reveal the efficiency of the proposed method, it is compared with a meta-heuristic method, multi-objective Genetic Programing (GP). Besides, it is applied to synthesize MCNC benchmark circuits. The results are indicative of the outperformance of the proposed method in comparison to multi-objective GP method. Also, for the MCNC benchmark circuits, there is an average reduction of 10.5% in the number of levels as well as 16.8% and 33.5% in the number of majority and inverter gates, as compared to the best available method respectively.

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Genetic algorithm based logic optimization for multi- output majority gate-based nano-electronic circuits

Cited by 15 publications

References 10 publications

Optimization of Quantum Cellular Automata Circuits by Genetic Algorithm

Optimization of Quantum Cellular Automata Circuits by Genetic Algorithm

Improving logic function synthesis, through wire crossing reduction in quantum‐dot cellular automata layout

A multi-objective synthesis methodology for majority/minority logic networks

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