Genetic method for compressed skewed-load delay test generation

Abstract

Complex system-on-chips (SOCs) require low-overhead testability methods to keep the test cost at an acceptable level. Skewed-load tests seem to be the appropriate way to test delay faults in these SOCs because the test application requires only one storage element per scan cell. Compressed skewedload test generator based on genetic algorithm is proposed for wrapper-based logic cores of SOCs. Deterministic populationinitialization is used to ensure the highest achievable transition delay fault coverage for the given wrapper and scan cell order. The developed genetic algorithm performs test data compression by generating test vectors containing already overlapped test vector pairs. The experimental results show high fault coverages, decreased test lengths and better scalability in comparison to recent methods.

Analysis of Series of Measurements From Job-Centric Monitoring by Statistical Functions

“…The analysis of monitoring data is a common Big Data challenge. Therefore, we started by studying related work [14], where we identified a set of analysis techniques like genetic algorithms [6,7,17,29], machine learning [2,[19][20][21], sequence comparison [1,9,24,25], intrusion detection [5,26,27], and statistic of events [4,18,28]. The most promising technique is a similarity comparison [8,13].…”