Abstract:CMOS miniaturization is now approaching the sub-10 nm level, and further downscaling is expected. This size scaling will end sooner or later, however, because the typical size is approaching the atomic distance level in crystalline Si. In addition, it is said that electron transport in FETs is ballistic or nearly ballistic, which means that the injection velocity at the virtual source is a physical parameter relevant for estimating the driving current. Channel-materials with higher carrier mobility than Si are… Show more
“…Ge has attracted attention as the most promising candidate for next-generation material because it has a higher carrier mobility than Si for both electrons and holes and is compatible with conventional Si processing 1 â 3 . Effective mobilities in Ge metal-oxide-semiconductor field-effect transistors (MOSFETs) have exceeded those in Si-MOSFETs because of the development of device technologies including gate stacks 4 â 8 . In addition, Ge has a lower crystallization temperature and grain-boundary potential than Si 9 â 12 .…”
Section: Introductionmentioning
confidence: 99%
“…By using these techniques, Ge-TFTs have been fabricated on thermally oxidized Si 21 , 26 , 27 , glass 28 â 31 , and even flexible substrates 22 , 32 . Since gate stack technology for Ge has developed sufficiently 8 , recent Ge-TFTs performance is limited by the properties of the poly-Ge thin film itself 21 , 22 , 26 â 32 . Some of these TFTs exhibited effective hole mobilities greater than 100 cm 2 /V s 22 , 26 , 28 .…”
To improve the performance of electronic devices, extensive research efforts have recently focused on the effect of incorporating Sn into Ge. In the present work, we investigate how Sn composition x (0ââ€âxââ€â0.12) and deposition temperature Td (50ââ€âTdââ€â200â°C) of the Ge1âxSnx precursor affect subsequent solid-phase crystallization. Upon incorporating 3.2% Sn, which is slightly above the solubility limit of Sn in Ge, the crystal grain size increases and the grain-boundary barrier decreases, which increases the hole mobility from 80 to 250âcm2/VâŻs. Furthermore, at Tdâ=â125â°C, the hole mobility reaches 380âcm2/VâŻs, which is tentatively attributed to the formation of a dense amorphous GeSn precursor. This is the highest hole mobility for semiconductor thin films on insulators formed below 500â°C. These results thus demonstrate the usefulness of Sn doping of polycrystalline Ge and the importance of temperature while incorporating Sn. These findings make it possible to fabricate advanced Ge-based devices including high-speed thin-film transistors.
“…Ge has attracted attention as the most promising candidate for next-generation material because it has a higher carrier mobility than Si for both electrons and holes and is compatible with conventional Si processing 1 â 3 . Effective mobilities in Ge metal-oxide-semiconductor field-effect transistors (MOSFETs) have exceeded those in Si-MOSFETs because of the development of device technologies including gate stacks 4 â 8 . In addition, Ge has a lower crystallization temperature and grain-boundary potential than Si 9 â 12 .…”
Section: Introductionmentioning
confidence: 99%
“…By using these techniques, Ge-TFTs have been fabricated on thermally oxidized Si 21 , 26 , 27 , glass 28 â 31 , and even flexible substrates 22 , 32 . Since gate stack technology for Ge has developed sufficiently 8 , recent Ge-TFTs performance is limited by the properties of the poly-Ge thin film itself 21 , 22 , 26 â 32 . Some of these TFTs exhibited effective hole mobilities greater than 100 cm 2 /V s 22 , 26 , 28 .…”
To improve the performance of electronic devices, extensive research efforts have recently focused on the effect of incorporating Sn into Ge. In the present work, we investigate how Sn composition x (0ââ€âxââ€â0.12) and deposition temperature Td (50ââ€âTdââ€â200â°C) of the Ge1âxSnx precursor affect subsequent solid-phase crystallization. Upon incorporating 3.2% Sn, which is slightly above the solubility limit of Sn in Ge, the crystal grain size increases and the grain-boundary barrier decreases, which increases the hole mobility from 80 to 250âcm2/VâŻs. Furthermore, at Tdâ=â125â°C, the hole mobility reaches 380âcm2/VâŻs, which is tentatively attributed to the formation of a dense amorphous GeSn precursor. This is the highest hole mobility for semiconductor thin films on insulators formed below 500â°C. These results thus demonstrate the usefulness of Sn doping of polycrystalline Ge and the importance of temperature while incorporating Sn. These findings make it possible to fabricate advanced Ge-based devices including high-speed thin-film transistors.
“…Ge complementary metal-oxide-semiconductors (CMOSs) are expected to be promising for scaling beyond the Si-CMOS limit because Ge has a higher carrier mobility than Si for both electrons and holes and is compatible with conventional Si processing. [1][2][3][4] For both p and n channels, effective mobilities in Ge MOS field-effect transistors (MOSFETs) have exceeded those in Si-MOSFETs because of the development of device technologies including gate stacks. [4][5][6][7][8] The most promising usage of such high-performance Ge-CMOS is to integrate it into Si large-scale integrated circuits (LSIs) or flat-panel displays.…”
mentioning
confidence: 99%
“…[1][2][3][4] For both p and n channels, effective mobilities in Ge MOS field-effect transistors (MOSFETs) have exceeded those in Si-MOSFETs because of the development of device technologies including gate stacks. [4][5][6][7][8] The most promising usage of such high-performance Ge-CMOS is to integrate it into Si large-scale integrated circuits (LSIs) or flat-panel displays. To achieve this, low-temperature Ge-on-insulator (GOI) technology has been developed, including solid-phase crystallization (SPC), [9][10][11][12][13] laser annealing, [14][15][16][17][18] chemical vapor deposition, 19,20 flash-lamp annealing, 21 the seed layer technique, 22 and metal-induced crystallization.…”
Low-temperature synthesis of polycrystalline (poly-) Ge on insulators is a key technology to integrate Ge-CMOS into existing devices. However, Fermi level control in poly-Ge has been difficult because poly-Ge has remained naturally highly p-type due to its defect-induced acceptors. We investigated the formation of n-type poly-Ge (thickness: 100-500 nm) using the advanced solid-phase crystallization technique with Sb-doped densified precursors. Sb doping on the order of 10 20 cm Ă3 facilitated lateral growth rather than nucleation in Ge, resulting in large grains exceeding 15 lm at a low growth temperature (375 C). The subsequent heat treatment (500 C) provided the highest electron mobility (200 cm 2 /V s) and the lowest electron density (5 Ă 10 17 cm Ă3) among n-type poly-Ge directly grown on insulators. These findings will provide a means for the monolithic integration of high-performance Ge-CMOS into Si-LSIs and flat-panel displays.
“…To our knowledge, this is the first demonstration of a hole-selective contact made with a TMO on an n-type semiconductor different than c-Si. Thus, it might open the door to new device architectures, not only for PV applications, but also in photonics and CMOS electronics, where the integration of TMOs is being investigated (Sanchez et al 2016), along with the use of different semiconductors having higher carrier mobilities and extended spectral response than c-Si, such as Ge (Reboud et al 2017;Toriumi and Nishimura 2017).…”
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citationsâcitations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.