2016 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS) 2016
DOI: 10.1109/ispcs.2016.7579508
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Global sample synchronization trigger

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“…Specifically, the Analog-to-Digital Converter (ADC) triggered by the local oscillator is reset at each rising edge of the Pulse Per Second (PPS) signal to achieve synchronization once every second (AbdelRaheem et al, 2022;Pardo-Zamora et al, 2021;Monteiro et al, 2016). However, discrepancies between the PPS signal and the local oscillator's clock domain may result in variations in the actual sampling interval compared to the ideal interval, leading to what is known as Sampling Time Error (STE) (Yao et al, 2018;AbdelRaheem et al, 2022), as illustrated in Figure 1.…”
Section: Introductionmentioning
confidence: 99%
“…Specifically, the Analog-to-Digital Converter (ADC) triggered by the local oscillator is reset at each rising edge of the Pulse Per Second (PPS) signal to achieve synchronization once every second (AbdelRaheem et al, 2022;Pardo-Zamora et al, 2021;Monteiro et al, 2016). However, discrepancies between the PPS signal and the local oscillator's clock domain may result in variations in the actual sampling interval compared to the ideal interval, leading to what is known as Sampling Time Error (STE) (Yao et al, 2018;AbdelRaheem et al, 2022), as illustrated in Figure 1.…”
Section: Introductionmentioning
confidence: 99%