Gold-thickness-dependent Schottky barrier height for charge transfer in metal-assisted chemical etching of silicon

Abstract

Large-area, vertically aligned silicon nanowires with a uniform diameter along the height direction were fabricated by combining in situ-formed anodic aluminum oxide template and metal-assisted chemical etching. The etching rate of the Si catalyzed using a thick Au mesh is much faster than that catalyzed using a thin one, which is suggested to be induced by the charge transport process. The thick Au mesh in contact with the Si produces a low Au/Si Schottky barrier height, facilitating the injection of electronic holes from the Au to the Si, thus resulting in a high etching rate.

GaAs pillar array-based light emitting diodes fabricated by metal-assisted chemical etching

“…It has been reported that the Schottky barrier height, which can be affected by the metal work function, thickness, and size, as well as the semiconductor doping type and level, can affect the etch rate, with faster etch rates for ntype GaN 40 and thicker Au for p-type Si. 41 The Schottky barrier height analysis used in the case of GaN 40 cannot explain the doping type dependence observed in the current study, possibly because the etching condition that is low in oxidant concentration makes the majority carrier transport in the semiconductor play a dominant role in determining the etch rate. Although the exact nature of this VER enhancement has not been explored in this study, we believe it is related to the inherent excess presence of holes in p-type samples and, therefore, improved oxidation rates.…”

Metal-assisted chemical etching of silicon and the behavior of nanoscale silicon materials as Li-ion battery anodes

“…It was shown that the etching rate of Si increased with the increasing thickness of an Au mesh that was deposited on the patterned Si surface prior to MAC etching. The faster etching rate was attributed to the Au mesh reducing the Si/Au Schottky barrier height and allowing an injection of holes from the Au into the Si, facilitating a higher etching rate [105]. The use of masks on Si prior to etching and their influence on the etching process will be discussed in more detail in the next section.…”

“…This method is cheap and repeatable, and AAOs with a range of pore diameters and interpore distances can be fabricated. MAC etching in combination with an AAO mask exhibits better control of the diameter, spacing, and density of Si NWs than etching without the AAO mask [105]. However, a trade-off exists with the utilization of an AAO mask possibly reducing the areal density of the Si NWs on a given surface area.…”

Photothermoelectric Effects in Nanoporous Silicon

“…[ 20 ] The position-dependent photocurrent (>1 µA) measured in the device, which is partially induced by local heating from the illumination at the Au/NP-Si interface, is 10-100 times larger than the photocurrents (<100 nA) in graphene-based devices. The position sensitivity of the photoresponse can be explained by the series connection of two Schottky junctions.…”