GPGPUs ECC efficiency and efficacy

Oliveira, Daniel; Rech, Paolo; Pilla, Laércio Lima; Navaux, Philippe O. A.; Carro, Luigi

doi:10.1109/dft.2014.6962085

Cited by 19 publications

(13 citation statements)

References 15 publications

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“…-Detection with redundancy without diversity [163,6,191,178,199,57,73,138,99,164,34,170,120,140,77,127,139] and with diversity [13,14,8,12] -Detection and/or correction with coding (e.g., ECC) and checkers [57,120,169,139,108,124,125,140,132] -Recovery with re-execution or checkpoints [71,175,180,135,115,124] -Mitigation with shielding and reconfiguration [153,127,91,193] • Application-dependent:…”

Section: Random Hw Failuresmentioning

confidence: 99%

“…-Detection and fault-tolerance algorithmic approaches [35,138,169,170,168,195,140,49,50,110,139,156,102,202,80,204,58,76] -Fault-tolerance based on intrinsic application and/or input data characteristics [63,78,159,158] §4…”

Section: Random Hw Failuresmentioning

confidence: 99%

“…Table 5 classifies FI methods and tools used to evaluate the reliability and resilience of GPU devices and components, using the FI taxonomy defined by Benso et al [28]: execution/simulation and software/hardware. And the basic effects of a FI action are: no effect (an error is not induced, or implemented safety measures correct it), functional interruption (e.g., crash) and Silent Data Corruption (SDC) (the induced error corrupts data or the GPU internal state) [139].…”

Section: Gpu Device Reliability Evaluation Metricsmentioning

confidence: 99%

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GPU Devices for Safety-Critical Systems: A Survey

et al. 2022

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Graphics Processing Unit (GPU) devices and their associated software programming languages and frameworks can deliver the computing performance required to facilitate the development of next-generation high-performance safety-critical systems such as autonomous driving systems. However, the integration of complex, parallel and computationally demanding software functions with different safety-criticality levels on GPU devices with shared hardware resources contributes to several safety certification challenges. This survey categorizes and provides an overview of research contributions that address GPU devices’ random hardware failures, systematic failures and independence of execution.

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Section: Random Hw Failuresmentioning

confidence: 99%

Section: Random Hw Failuresmentioning

confidence: 99%

Section: Gpu Device Reliability Evaluation Metricsmentioning

confidence: 99%

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GPU Devices for Safety-Critical Systems: A Survey

et al. 2022

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“…Most of the experiments have been performed on high-performance NVIDIA architectures, including Fermi, Kepler or Pascal using neutron beams [11]- [13]. Several papers have evaluated the efficiency, efficacy and overhead of the hardware hardening ECC mechanism provided by most modern GPUs [14], [15]. Most of them conclude that this protection mechanism significantly reduces the SDCs, but increases the Single Event Functional Interrupts (SEFI) of the algorithms, for example when multiple-bit faults arise.…”

Section: Related Workmentioning

confidence: 99%

Comparison of Parallel Implementation Strategies in GPU-Accelerated System-on-Chip Under Proton Irradiation

Badía

León

Belloch

et al. 2022

IEEE Trans. Nucl. Sci.

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Commercial Off-The-Shelf (COTS) System-on-Chip (SoC) are becoming widespread in embedded systems. Many of them include a multicore CPU and a high-end GPU. They combine high computational performance with low power consumption and flexible multilevel parallelism. This kind of device is also being considered for radiation environments where large amounts of data must be processed or compute intensive applications must be executed. In this paper we compare three different strategies to perform matrix multiplication in the GPU of a Tegra TK1 SoC. Our aim is to analyze how the different use of the resources of the GPU influences, not only the computational performance of the algorithm, but also its radiation sensitivity. Radiation experiments with protons were performed to compare the behaviour of the three strategies. Experimental results show that most of the errors force a reboot of the platform. The number of errors is directly related with how the algorithms use the internal memories of the GPU, and increases with the matrix size. It is also related with the number of transactions with the global memory, which in our experiments is not affected by the radiation. Results show that the smallest cross-section is obtained with the fastest algorithm, even if it uses the cores of the GPU more intensively.

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“…This offloading of computation poses new issues related to both the access to the execution state and the particular reliability characteristics of acceleration devices. For example, GPUs tend to have higher DUEs per GB than CPUs [ 74 , 156 , 169 ] and GPUs may come with large memory ports (e.g., 128 bit for High-Bandwidth Memory 2 technologies) as well as reduced correction capabilities [ 132 ]. As an example, the work in Reference [ 60 ] shows that the DUE rate per GB for GDDR5 memory in NVIDIA Kepler GPUs can be as high as five times the DUE rate of CPU memory equipped with state-of-the-art error checking and correction support.…”

Section: 21mentioning

confidence: 99%

Predictive Reliability and Fault Management in Exascale Systems

et al. 2020

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Performance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, due to the exponential increase in the number of devices per chip, to higher system fault rates. Consequently, High-performance Computing (HPC) systems need to integrate prediction, detection, and recovery mechanisms to cope with faults efficiently. This article reviews fault detection, fault prediction, and recovery techniques in HPC systems, from electronics to system level. We analyze their strengths and limitations. Finally, we identify the promising paths to meet the reliability levels of Exascale systems.

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GPGPUs ECC efficiency and efficacy

Cited by 19 publications

References 15 publications

GPU Devices for Safety-Critical Systems: A Survey

GPU Devices for Safety-Critical Systems: A Survey

Comparison of Parallel Implementation Strategies in GPU-Accelerated System-on-Chip Under Proton Irradiation

Predictive Reliability and Fault Management in Exascale Systems

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